{"id":"https://openalex.org/W1532781142","doi":"https://doi.org/10.1109/meco.2015.7181910","title":"Design of analog to digital converters for multiple-valued systems","display_name":"Design of analog to digital converters for multiple-valued systems","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1532781142","doi":"https://doi.org/10.1109/meco.2015.7181910","mag":"1532781142"},"language":"en","primary_location":{"id":"doi:10.1109/meco.2015.7181910","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2015.7181910","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 4th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052826455","display_name":"Du\u0161anka Bundalo","orcid":null},"institutions":[{"id":"https://openalex.org/I173887773","display_name":"University of Banja Luka","ror":"https://ror.org/0282m7c06","country_code":"BA","type":"education","lineage":["https://openalex.org/I173887773"]}],"countries":["BA"],"is_corresponding":false,"raw_author_name":"Dusanka Bundalo","raw_affiliation_strings":["Faculty of Philosophy, University of Banja Luka, Banja Luka, Bosnia and Herzegovina","University of Banja Luka,Faculty of Philosophy,Banja Luka,Bosnia and Herzegovina"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Philosophy, University of Banja Luka, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]},{"raw_affiliation_string":"University of Banja Luka,Faculty of Philosophy,Banja Luka,Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036429281","display_name":"Ferid Softie","orcid":null},"institutions":[{"id":"https://openalex.org/I173887773","display_name":"University of Banja Luka","ror":"https://ror.org/0282m7c06","country_code":"BA","type":"education","lineage":["https://openalex.org/I173887773"]}],"countries":["BA"],"is_corresponding":false,"raw_author_name":"Ferid Softie","raw_affiliation_strings":["University of Banja Luka, Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina","University of Banja Luka Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Banja Luka, Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]},{"raw_affiliation_string":"University of Banja Luka Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090289952","display_name":"Dra\u017een Pa\u0161ali\u0107","orcid":null},"institutions":[{"id":"https://openalex.org/I173887773","display_name":"University of Banja Luka","ror":"https://ror.org/0282m7c06","country_code":"BA","type":"education","lineage":["https://openalex.org/I173887773"]}],"countries":["BA"],"is_corresponding":false,"raw_author_name":"Drazen Pasalic","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Banja Luka, Banja Luka, Bosnia and Herzegovina","SBERBANK, Banja Luka, Bosnia and Herzegovina"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Banja Luka, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]},{"raw_affiliation_string":"SBERBANK, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038425277","display_name":"Zlatko Bundalo","orcid":"https://orcid.org/0000-0003-4495-3201"},"institutions":[{"id":"https://openalex.org/I173887773","display_name":"University of Banja Luka","ror":"https://ror.org/0282m7c06","country_code":"BA","type":"education","lineage":["https://openalex.org/I173887773"]},{"id":"https://openalex.org/I194184283","display_name":"University of East Sarajevo","ror":"https://ror.org/022mv6k27","country_code":"BA","type":"education","lineage":["https://openalex.org/I194184283"]}],"countries":["BA"],"is_corresponding":false,"raw_author_name":"Zlatko Bundalo","raw_affiliation_strings":["Faculty of Traffic Engineering, University of East Sarajevo, Doboj, Bosnia and Herzegovina","University of Banja Luka Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Traffic Engineering, University of East Sarajevo, Doboj, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I194184283"]},{"raw_affiliation_string":"University of Banja Luka Faculty of Electrical Engineering, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007882428","display_name":"Miroslav Kostadinovi\u0107","orcid":"https://orcid.org/0000-0002-0841-9047"},"institutions":[{"id":"https://openalex.org/I173887773","display_name":"University of Banja Luka","ror":"https://ror.org/0282m7c06","country_code":"BA","type":"education","lineage":["https://openalex.org/I173887773"]},{"id":"https://openalex.org/I194184283","display_name":"University of East Sarajevo","ror":"https://ror.org/022mv6k27","country_code":"BA","type":"education","lineage":["https://openalex.org/I194184283"]}],"countries":["BA"],"is_corresponding":false,"raw_author_name":"Miroslav Kostadinovic","raw_affiliation_strings":["SBERBANK, Banja Luka, Bosnia and Herzegovina","[University of East Sarajevo, Faculty of Traffic Engineering, Doboj, Bosnia and Herzegovina]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SBERBANK, Banja Luka, Bosnia and Herzegovina","institution_ids":["https://openalex.org/I173887773"]},{"raw_affiliation_string":"[University of East Sarajevo, Faculty of Traffic Engineering, Doboj, Bosnia and Herzegovina]","institution_ids":["https://openalex.org/I194184283"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0394494,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"17","issue":null,"first_page":"228","last_page":"231"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9818999767303467,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9818999767303467,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9629999995231628,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.9063713550567627},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7535930871963501},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.671534538269043},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5599154233932495},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.48070603609085083},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4367815852165222},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.4359346032142639},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.43211066722869873},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4190743863582611},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41741782426834106},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3484548032283783},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2929633855819702},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2887958586215973},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10326641798019409}],"concepts":[{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.9063713550567627},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7535930871963501},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.671534538269043},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5599154233932495},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.48070603609085083},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4367815852165222},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.4359346032142639},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.43211066722869873},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4190743863582611},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41741782426834106},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3484548032283783},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2929633855819702},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2887958586215973},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10326641798019409},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/meco.2015.7181910","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2015.7181910","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 4th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W657955859","https://openalex.org/W1525148056","https://openalex.org/W2117481108","https://openalex.org/W2120821928","https://openalex.org/W2186586241","https://openalex.org/W2536028167"],"related_works":["https://openalex.org/W2416214423","https://openalex.org/W2385360076","https://openalex.org/W2377859269","https://openalex.org/W1603142061","https://openalex.org/W2296682797","https://openalex.org/W4210925376","https://openalex.org/W2168466824","https://openalex.org/W1862020018","https://openalex.org/W2136192029","https://openalex.org/W2498536136"],"abstract_inverted_index":{"Principles,":[0],"methods":[1],"and":[2,6,24,49,63,95,100,133,136],"possibilities":[3],"for":[4,17,51],"design":[5,52],"implementation":[7,101],"of":[8,53,66,81,87,102,105,117,123],"CMOS":[9,55,69,103],"parallel":[10,54],"analog":[11,34,56,70,106],"to":[12,57,71,108],"multiple-valued":[13,18],"digital":[14,20,39,59,73,112],"signal":[15,35,40,74,107,113],"converters":[16,30,60,75,83,89,94,104],"(MV)":[19],"systems":[21],"are":[22,61,76,90,119],"considered":[23],"proposed":[25,62],"in":[26],"this":[27],"paper.":[28],"Such":[29],"perform":[31],"conversion":[32],"from":[33],"into":[36],"any":[37,43],"MV":[38,44,58,72],"that":[41],"use":[42],"logic":[45,115],"basis.":[46],"General":[47],"principle":[48],"structure":[50],"described.":[64],"Circuits":[65],"two":[67],"digit":[68],"described":[77],"as":[78,121],"an":[79],"illustration":[80],"the":[82,88,124,141],"design.":[84,125],"Two":[85],"types":[86],"described:":[91],"powerful":[92],"type":[93,97],"simple":[96],"converters.":[98],"Design":[99],"so":[109],"called":[110],"quinary":[111],"(with":[114],"basis":[116],"5)":[118],"shown":[120],"examples":[122],"Proposed":[126],"solutions":[127],"were":[128,138],"analyzed":[129],"by":[130,140],"computer":[131],"simulations":[132],"all":[134],"descriptions":[135],"considerations":[137],"confirmed":[139],"simulations.":[142]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
