{"id":"https://openalex.org/W1567935579","doi":"https://doi.org/10.1109/meco.2015.7181876","title":"Configurable hardware components generator in Python","display_name":"Configurable hardware components generator in Python","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1567935579","doi":"https://doi.org/10.1109/meco.2015.7181876","mag":"1567935579"},"language":"en","primary_location":{"id":"doi:10.1109/meco.2015.7181876","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2015.7181876","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 4th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084820164","display_name":"Andrej Tro\u0161t","orcid":"https://orcid.org/0000-0001-9641-5806"},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":true,"raw_author_name":"Andrej Trost","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Ljubljana, Slovenia","Faculty of Electrical Engineering, University of Ljubljana Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I153976015"]},{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana Ljubljana, Slovenia","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109219710","display_name":"Andrej \u017demva","orcid":null},"institutions":[{"id":"https://openalex.org/I153976015","display_name":"University of Ljubljana","ror":"https://ror.org/05njb9z20","country_code":"SI","type":"education","lineage":["https://openalex.org/I153976015"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"Andrej Zemva","raw_affiliation_strings":["Faculty of Electrical Engineering, University of Ljubljana, Ljubljana, Slovenia","Faculty of Electrical Engineering, University of Ljubljana Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I153976015"]},{"raw_affiliation_string":"Faculty of Electrical Engineering, University of Ljubljana Ljubljana, Slovenia","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5084820164"],"corresponding_institution_ids":["https://openalex.org/I153976015"],"apc_list":null,"apc_paid":null,"fwci":0.323,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56618906,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"17","issue":null,"first_page":"96","last_page":"99"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8089494109153748},{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.7303439378738403},{"id":"https://openalex.org/keywords/scripting-language","display_name":"Scripting language","score":0.6507143974304199},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5398864150047302},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5269927382469177},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5178649425506592},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.5168512463569641},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5130180716514587},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4750675857067108},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.45726004242897034},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4365732669830322},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4285047650337219},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4281129240989685},{"id":"https://openalex.org/keywords/graphics-pipeline","display_name":"Graphics pipeline","score":0.41119539737701416},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23097634315490723},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.1986396610736847},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.16273754835128784},{"id":"https://openalex.org/keywords/3d-computer-graphics","display_name":"3D computer graphics","score":0.1433226466178894},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.09694451093673706}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8089494109153748},{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.7303439378738403},{"id":"https://openalex.org/C61423126","wikidata":"https://www.wikidata.org/wiki/Q187432","display_name":"Scripting language","level":2,"score":0.6507143974304199},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5398864150047302},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5269927382469177},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5178649425506592},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.5168512463569641},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5130180716514587},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4750675857067108},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.45726004242897034},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4365732669830322},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4285047650337219},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4281129240989685},{"id":"https://openalex.org/C173552908","wikidata":"https://www.wikidata.org/wiki/Q1366289","display_name":"Graphics pipeline","level":4,"score":0.41119539737701416},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23097634315490723},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.1986396610736847},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.16273754835128784},{"id":"https://openalex.org/C66629338","wikidata":"https://www.wikidata.org/wiki/Q189177","display_name":"3D computer graphics","level":3,"score":0.1433226466178894},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.09694451093673706},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/meco.2015.7181876","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2015.7181876","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 4th Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1588280643","https://openalex.org/W1588417671","https://openalex.org/W1591070193","https://openalex.org/W2085118203","https://openalex.org/W2100905076","https://openalex.org/W2156498800","https://openalex.org/W2159311419","https://openalex.org/W2166029537","https://openalex.org/W4299839838","https://openalex.org/W6635333000"],"related_works":["https://openalex.org/W4281926497","https://openalex.org/W2274562545","https://openalex.org/W2269990635","https://openalex.org/W3146054601","https://openalex.org/W2042762783","https://openalex.org/W4283730710","https://openalex.org/W4313484792","https://openalex.org/W2921149022","https://openalex.org/W1905101075","https://openalex.org/W1536721241"],"abstract_inverted_index":{"Traditional":[0],"hardware":[1,12,26,43,81],"description":[2,82],"languages":[3],"are":[4],"limited":[5],"when":[6],"describing":[7],"highly":[8],"configurable":[9,59],"and":[10,45,71,83],"reusable":[11],"components.":[13],"The":[14,33,64],"paper":[15],"introduces":[16],"methodology":[17,78],"based":[18],"on":[19,29],"a":[20],"Python":[21],"language":[22,35],"for":[23],"design":[24,84],"of":[25],"component":[27,62],"generators":[28],"higher":[30],"abstraction":[31],"level.":[32,54],"scripting":[34],"is":[36],"used":[37],"to":[38,51],"produce":[39],"customizable":[40],"cycle":[41],"accurate":[42],"behavior":[44],"open-source":[46],"tools":[47],"provide":[48],"automatic":[49,65],"conversion":[50],"register":[52],"transfer":[53],"A":[55],"case":[56],"study":[57],"presents":[58],"graphics":[60],"processing":[61],"design.":[63],"interface":[66],"insertion,":[67],"state":[68],"machine":[69],"synthesis":[70],"pipeline":[72],"configuration":[73],"provided":[74],"by":[75],"the":[76],"proposed":[77],"enables":[79],"efficient":[80],"space":[85],"exploration.":[86]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
