{"id":"https://openalex.org/W1980880153","doi":"https://doi.org/10.1109/meco.2014.6862688","title":"Parallel form of FIR filter for implementation on multicore DSP","display_name":"Parallel form of FIR filter for implementation on multicore DSP","publication_year":2014,"publication_date":"2014-06-01","ids":{"openalex":"https://openalex.org/W1980880153","doi":"https://doi.org/10.1109/meco.2014.6862688","mag":"1980880153"},"language":"en","primary_location":{"id":"doi:10.1109/meco.2014.6862688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2014.6862688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070534945","display_name":"Sergey Vityazev","orcid":"https://orcid.org/0000-0002-9851-5066"},"institutions":[{"id":"https://openalex.org/I4210149385","display_name":"Ryazan State Radio Engineering University","ror":"https://ror.org/04y34yk39","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210149385"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"S. Vityazev","raw_affiliation_strings":["Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia","institution_ids":["https://openalex.org/I4210149385"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090744313","display_name":"Aleksei Kharin","orcid":"https://orcid.org/0000-0002-2897-8532"},"institutions":[{"id":"https://openalex.org/I4210149385","display_name":"Ryazan State Radio Engineering University","ror":"https://ror.org/04y34yk39","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210149385"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"A. Kharin","raw_affiliation_strings":["Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia","institution_ids":["https://openalex.org/I4210149385"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048518990","display_name":"Alexandr A. Kalinkin","orcid":"https://orcid.org/0000-0003-0720-4850"},"institutions":[{"id":"https://openalex.org/I4210149385","display_name":"Ryazan State Radio Engineering University","ror":"https://ror.org/04y34yk39","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210149385"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"A. Kalinkin","raw_affiliation_strings":["Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia","institution_ids":["https://openalex.org/I4210149385"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018280764","display_name":"Vladimir Vityazev","orcid":"https://orcid.org/0000-0003-3558-6008"},"institutions":[{"id":"https://openalex.org/I4210149385","display_name":"Ryazan State Radio Engineering University","ror":"https://ror.org/04y34yk39","country_code":"RU","type":"education","lineage":["https://openalex.org/I4210149385"]}],"countries":["RU"],"is_corresponding":false,"raw_author_name":"V. Vityazev","raw_affiliation_strings":["Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Radio Engineering and Telecommunications Ryazan State Radio Engineering University, RSREU Ryazan, Russia","institution_ids":["https://openalex.org/I4210149385"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210149385"],"apc_list":null,"apc_paid":null,"fwci":0.5638,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.56530973,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"177","last_page":"179"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9908999800682068,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14470","display_name":"Advanced Data Processing Techniques","score":0.9894999861717224,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.8825061321258545},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.8821202516555786},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.827115535736084},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7586920261383057},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6743416786193848},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.6726222038269043},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.48302826285362244},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.43847641348838806},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.41739997267723083},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36505186557769775},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3281380534172058},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17148202657699585}],"concepts":[{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.8825061321258545},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.8821202516555786},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.827115535736084},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7586920261383057},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6743416786193848},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.6726222038269043},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.48302826285362244},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.43847641348838806},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.41739997267723083},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36505186557769775},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3281380534172058},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17148202657699585},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/meco.2014.6862688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/meco.2014.6862688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 3rd Mediterranean Conference on Embedded Computing (MECO)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2112398300","https://openalex.org/W2120881863","https://openalex.org/W2215727256","https://openalex.org/W2535581782"],"related_works":["https://openalex.org/W2352374383","https://openalex.org/W1902114972","https://openalex.org/W2572037897","https://openalex.org/W1556297113","https://openalex.org/W2352569066","https://openalex.org/W126808228","https://openalex.org/W2532375706","https://openalex.org/W2379636925","https://openalex.org/W2390600871","https://openalex.org/W1980880153"],"abstract_inverted_index":{"Digital":[0],"signal":[1,12],"processor":[2],"(DSP)":[3],"evolution":[4],"trends":[5],"now":[6],"to":[7,26],"multicore":[8,45,59,90],"architectures.":[9],"Parallelization":[10],"of":[11,17,31,48,53,94],"processing":[13],"algorithm":[14,36],"becomes":[15],"one":[16],"the":[18,95],"most":[19],"important":[20],"challenge":[21],"while":[22],"migrating":[23],"from":[24,68],"single":[25],"multi-core.":[27],"Specifically,":[28],"a":[29,33],"problem":[30],"such":[32],"classical":[34],"DSP":[35,46,60,67],"as":[37],"finite":[38],"impulse":[39],"response":[40],"(FIR)":[41],"filtering":[42],"implementation":[43,57,98],"on":[44,58,89],"is":[47,61,71,74],"great":[49],"interest.":[50],"Parallel":[51],"form":[52,79,86],"FIR":[54,78,85],"filter":[55],"for":[56],"considered":[62],"in":[63],"this":[64],"paper.":[65],"TMS320C6678":[66],"Texas":[69],"Instruments":[70],"used.":[72],"It":[73],"shown":[75],"that":[76],"parallel":[77,101],"has":[80],"some":[81],"advantages":[82],"over":[83],"direct":[84],"when":[87],"implementing":[88],"processor.":[91],"Experimental":[92],"results":[93],"offered":[96],"approach":[97],"with":[99],"OpenMP":[100],"programming":[102],"technique":[103],"are":[104],"demonstrated.":[105]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
