{"id":"https://openalex.org/W2109154609","doi":"https://doi.org/10.1109/mdt.2003.1198689","title":"Infrastructure IP for configuration and test of boards and systems","display_name":"Infrastructure IP for configuration and test of boards and systems","publication_year":2003,"publication_date":"2003-05-01","ids":{"openalex":"https://openalex.org/W2109154609","doi":"https://doi.org/10.1109/mdt.2003.1198689","mag":"2109154609"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2003.1198689","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1198689","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064932356","display_name":"Chris A. Clark","orcid":"https://orcid.org/0009-0004-9357-3760"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"C. Clark","raw_affiliation_strings":["Intellitech Corporation","Intellitech Corp.#TAB#"],"affiliations":[{"raw_affiliation_string":"Intellitech Corporation","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intellitech Corp.#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042908608","display_name":"Mike Ricchetti","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Ricchetti","raw_affiliation_strings":["Intellitech Corporation","Intellitech Corp.#TAB#"],"affiliations":[{"raw_affiliation_string":"Intellitech Corporation","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intellitech Corp.#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5064932356"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":2.2639,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.883585,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"3","first_page":"78","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8977276086807251},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5860933065414429},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5394481420516968},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.531640887260437},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.48616477847099304},{"id":"https://openalex.org/keywords/embedding","display_name":"Embedding","score":0.44691264629364014},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.37599438428878784},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.33910036087036133},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2595673203468323}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8977276086807251},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5860933065414429},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5394481420516968},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.531640887260437},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.48616477847099304},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.44691264629364014},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.37599438428878784},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.33910036087036133},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2595673203468323},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdt.2003.1198689","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1198689","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6600000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1508002371","https://openalex.org/W1512270982","https://openalex.org/W1785376308","https://openalex.org/W2028504835","https://openalex.org/W2054971791","https://openalex.org/W2172144846","https://openalex.org/W2527538440","https://openalex.org/W4285719527","https://openalex.org/W6728005429"],"related_works":["https://openalex.org/W2978026406","https://openalex.org/W2388687068","https://openalex.org/W4256495946","https://openalex.org/W2399091034","https://openalex.org/W2351581202","https://openalex.org/W2366922255","https://openalex.org/W2114320580","https://openalex.org/W1999657508","https://openalex.org/W2621101275","https://openalex.org/W2068239131"],"abstract_inverted_index":{"Embedding":[0],"infrastructure":[1,29],"IP":[2],"to":[3],"optimize":[4,42],"chip-level":[5],"manufacturing":[6,43],"test":[7,44],"and":[8,22,37,45],"debugging":[9],"has":[10],"recently":[11],"become":[12],"common":[13],"practice.":[14],"However,":[15],"adopting":[16],"the":[17],"same":[18],"approach":[19],"for":[20],"boards":[21],"systems":[23],"requires":[24],"a":[25,35],"different":[26],"family":[27,36],"of":[28],"IP.":[30],"This":[31],"article":[32],"introduces":[33],"such":[34],"discusses":[38],"how":[39],"it":[40],"can":[41],"debugging,":[46],"as":[47,49],"well":[48],"support":[50],"configurability,":[51],"especially":[52],"in":[53],"today's":[54],"reconfigurable":[55],"products.":[56]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
