{"id":"https://openalex.org/W2160995400","doi":"https://doi.org/10.1109/mdt.2003.1198688","title":"Benefits of a SoC-specific test methodology","display_name":"Benefits of a SoC-specific test methodology","publication_year":2003,"publication_date":"2003-05-01","ids":{"openalex":"https://openalex.org/W2160995400","doi":"https://doi.org/10.1109/mdt.2003.1198688","mag":"2160995400"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2003.1198688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1198688","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091222754","display_name":"M.S. Quasem","orcid":null},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M.S. Quasem","raw_affiliation_strings":["University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002067721","display_name":"Zhigang Jiang","orcid":"https://orcid.org/0000-0001-7019-3715"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhigang Jiang","raw_affiliation_strings":["University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100601790","display_name":"Sandeep K. Gupta","orcid":"https://orcid.org/0000-0002-2585-9378"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.K. Gupta","raw_affiliation_strings":["University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5091222754"],"corresponding_institution_ids":["https://openalex.org/I1174212"],"apc_list":null,"apc_paid":null,"fwci":0.5031,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.68602046,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"3","first_page":"68","last_page":"77"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.7069118022918701},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6051796674728394},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.5892698168754578},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5548918843269348},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5505058765411377},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.49982786178588867},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4493758976459503},{"id":"https://openalex.org/keywords/test-strategy","display_name":"Test strategy","score":0.4314660429954529},{"id":"https://openalex.org/keywords/test-management-approach","display_name":"Test Management Approach","score":0.41300657391548157},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20294761657714844},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17644450068473816},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.14217239618301392},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.07319432497024536}],"concepts":[{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.7069118022918701},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6051796674728394},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.5892698168754578},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5548918843269348},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5505058765411377},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.49982786178588867},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4493758976459503},{"id":"https://openalex.org/C188598960","wikidata":"https://www.wikidata.org/wiki/Q7705805","display_name":"Test strategy","level":3,"score":0.4314660429954529},{"id":"https://openalex.org/C7435765","wikidata":"https://www.wikidata.org/wiki/Q7705776","display_name":"Test Management Approach","level":5,"score":0.41300657391548157},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20294761657714844},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17644450068473816},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.14217239618301392},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.07319432497024536},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdt.2003.1198688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1198688","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2071316512","https://openalex.org/W2099089225","https://openalex.org/W2111994103","https://openalex.org/W2149608454","https://openalex.org/W2152763367","https://openalex.org/W2503952136"],"related_works":["https://openalex.org/W2138339522","https://openalex.org/W1604038184","https://openalex.org/W2483655395","https://openalex.org/W1973389480","https://openalex.org/W2267909634","https://openalex.org/W2236654242","https://openalex.org/W204726053","https://openalex.org/W2168669563","https://openalex.org/W2784516856","https://openalex.org/W2510269711"],"abstract_inverted_index":{"The":[0,16],"tradeoff":[1],"between":[2],"IP":[3,18,53],"protection":[4],"and":[5,33],"SoC-level":[6],"test":[7,31,45],"optimization":[8],"has":[9],"been":[10],"an":[11],"issue":[12],"for":[13],"some":[14],"time.":[15],"more":[17],"providers":[19],"protect":[20],"their":[21],"IP,":[22],"the":[23],"less":[24],"flexibility":[25],"system":[26],"developers":[27],"have":[28],"to":[29],"control":[30],"costs":[32],"fault":[34],"coverage.":[35],"In":[36],"this":[37],"paper,":[38],"a":[39],"new":[40],"approach":[41],"dynamically":[42],"extracts":[43],"IP-related":[44],"information":[46],"or":[47],"optimizing":[48],"SoC":[49],"testing":[50],"without":[51],"jeopardizing":[52],"protection.":[54]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}