{"id":"https://openalex.org/W2168952134","doi":"https://doi.org/10.1109/mdt.2003.1188257","title":"Minimizing pattern count for interconnect test under a ground bounce constraint","display_name":"Minimizing pattern count for interconnect test under a ground bounce constraint","publication_year":2003,"publication_date":"2003-03-01","ids":{"openalex":"https://openalex.org/W2168952134","doi":"https://doi.org/10.1109/mdt.2003.1188257","mag":"2168952134"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2003.1188257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1188257","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044629739","display_name":"Erik Jan Marinissen","orcid":"https://orcid.org/0000-0002-5058-8303"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"E.J. Marinissen","raw_affiliation_strings":["Philips Research Laboratories, Eindhoven, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008861550","display_name":"Bart Vermeulen","orcid":"https://orcid.org/0000-0002-1161-314X"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"B. Vermeulen","raw_affiliation_strings":["Philips Research Laboratories, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089300685","display_name":"Henk D. L. Hollmann","orcid":"https://orcid.org/0000-0003-4005-2369"},"institutions":[{"id":"https://openalex.org/I4210122849","display_name":"Philips (Netherlands)","ror":"https://ror.org/02p2bgp27","country_code":"NL","type":"company","lineage":["https://openalex.org/I4210122849"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"H. Hollmann","raw_affiliation_strings":["Philips Research Laboratories, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Philips Research Laboratories, Netherlands","institution_ids":["https://openalex.org/I4210122849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081540162","display_name":"R.G. Bennetts","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119244","display_name":"Bennetts Associates","ror":"https://ror.org/02evg2181","country_code":"GB","type":"other","lineage":["https://openalex.org/I4210119244"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"R.G. Bennetts","raw_affiliation_strings":["Bennetts Associates"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bennetts Associates","institution_ids":["https://openalex.org/I4210119244"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.8999,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.91418269,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"20","issue":"2","first_page":"8","last_page":"18"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.7482784986495972},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6858027577400208},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.584929347038269},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5835862755775452},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5404201149940491},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.49700477719306946},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4213060438632965},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.314569354057312},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11069568991661072},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09409543871879578},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07358300685882568}],"concepts":[{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.7482784986495972},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6858027577400208},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.584929347038269},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5835862755775452},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5404201149940491},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.49700477719306946},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4213060438632965},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.314569354057312},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11069568991661072},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09409543871879578},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07358300685882568},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":5,"locations":[{"id":"doi:10.1109/mdt.2003.1188257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2003.1188257","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},{"id":"pmh:872252","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=872252","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0740-7475","raw_type":"Article / Letter to the editor"},{"id":"pmh:877050","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=877050","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0740-7475","raw_type":"Article / Letter to the editor"},{"id":"pmh:oai:library.tue.nl:872252","is_oa":false,"landing_page_url":"http://repository.tue.nl/872252","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0740-7475","raw_type":"Article / Letter to the editor"},{"id":"pmh:oai:library.tue.nl:877050","is_oa":false,"landing_page_url":"http://repository.tue.nl/877050","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0740-7475","raw_type":"Article / Letter to the editor"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W128123307","https://openalex.org/W617042874","https://openalex.org/W1936733115","https://openalex.org/W1979477906","https://openalex.org/W2011039300","https://openalex.org/W2096691973","https://openalex.org/W2104500469","https://openalex.org/W2400771291","https://openalex.org/W2801910904","https://openalex.org/W4253112770","https://openalex.org/W4285719527","https://openalex.org/W4300936028","https://openalex.org/W6605234255","https://openalex.org/W6802923458"],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W4249035840","https://openalex.org/W2766970861","https://openalex.org/W3125341812","https://openalex.org/W1668171714","https://openalex.org/W4380607112","https://openalex.org/W1997278405","https://openalex.org/W2347989876","https://openalex.org/W2387306476"],"abstract_inverted_index":{"When":[0],"testing":[1],"the":[2,16],"interconnect":[3],"structures":[4],"on":[5],"a":[6,33],"board,":[7],"test":[8,17],"programmers":[9],"sometimes":[10],"ask,":[11],"How":[12],"can":[13],"I":[14],"control":[15],"pattern":[18],"generation":[19],"process":[20],"to":[21,31],"avoid":[22],"ground":[23],"bounce":[24],"problems":[25],"during":[26],"Extest":[27],"mode?":[28],"Those":[29],"wishing":[30],"satisfy":[32],"simultaneously-switching-outputs":[34],"constraint":[35],"will":[36],"find":[37],"several":[38],"new":[39],"solutions":[40],"in":[41],"this":[42],"article.":[43]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-28T07:46:37.118299","created_date":"2025-10-10T00:00:00"}
