{"id":"https://openalex.org/W2122593349","doi":"https://doi.org/10.1109/mdt.2002.1047740","title":"StepNP: a system-level exploration platform for network processors","display_name":"StepNP: a system-level exploration platform for network processors","publication_year":2002,"publication_date":"2002-11-01","ids":{"openalex":"https://openalex.org/W2122593349","doi":"https://doi.org/10.1109/mdt.2002.1047740","mag":"2122593349"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2002.1047740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1047740","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073518200","display_name":"Pierre Paulin","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["CH","FR"],"is_corresponding":true,"raw_author_name":"P.G. Paulin","raw_affiliation_strings":["STMicroelectronics, France","Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, France","institution_ids":["https://openalex.org/I4210104693"]},{"raw_affiliation_string":"Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091628585","display_name":"Chuck Pilkington","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]},{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH","FR"],"is_corresponding":false,"raw_author_name":"C. Pilkington","raw_affiliation_strings":["STMicroelectronics, France","Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, France","institution_ids":["https://openalex.org/I4210104693"]},{"raw_affiliation_string":"Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada","institution_ids":["https://openalex.org/I131827901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017704705","display_name":"Essaid Bensoudane","orcid":null},"institutions":[{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["CH","FR"],"is_corresponding":false,"raw_author_name":"E. Bensoudane","raw_affiliation_strings":["STMicroelectronics, France","Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics, France","institution_ids":["https://openalex.org/I4210104693"]},{"raw_affiliation_string":"Syst. Chip Platform Autom. Group, STMicroelectronics, Ottawa, Ont., Canada","institution_ids":["https://openalex.org/I131827901"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5073518200"],"corresponding_institution_ids":["https://openalex.org/I131827901","https://openalex.org/I4210104693"],"apc_list":null,"apc_paid":null,"fwci":12.9313,"has_fulltext":false,"cited_by_count":159,"citation_normalized_percentile":{"value":0.98882623,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"19","issue":"6","first_page":"17","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.7746744155883789},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6957661509513855},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6909667253494263},{"id":"https://openalex.org/keywords/network-processor","display_name":"Network processor","score":0.6381154656410217},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6379128098487854},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6362434029579163},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.34143367409706116},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1842823326587677}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.7746744155883789},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6957661509513855},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6909667253494263},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.6381154656410217},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6379128098487854},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6362434029579163},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.34143367409706116},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1842823326587677},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdt.2002.1047740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1047740","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6200000047683716,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W2010365467","https://openalex.org/W2116355244","https://openalex.org/W2132727849","https://openalex.org/W2153589713","https://openalex.org/W2160642395","https://openalex.org/W4243432551"],"related_works":["https://openalex.org/W1988690899","https://openalex.org/W2960588451","https://openalex.org/W1828767204","https://openalex.org/W2377085856","https://openalex.org/W3004408035","https://openalex.org/W4229569040","https://openalex.org/W1974983535","https://openalex.org/W2122593349","https://openalex.org/W2117274229","https://openalex.org/W2148228669"],"abstract_inverted_index":{"The":[0],"fast-changing":[1],"communications":[2],"market":[3],"requires":[4],"high-performance":[5],"yet":[6],"flexible":[7],"network-processing":[8,22],"platforms.":[9],"StepNP":[10],"is":[11],"an":[12],"exploratory":[13],"network":[14],"processor":[15],"simulation":[16],"environment":[17],"for":[18],"exploring":[19],"applications,":[20],"multiprocessor":[21],"architectures,":[23],"and":[24,31,43],"SoC":[25],"tools.":[26],"Supporting":[27],"model":[28],"interaction,":[29],"instrumentation,":[30],"analysis,":[32],"the":[33],"platform":[34],"lets":[35],"R&D":[36],"teams":[37],"easily":[38],"add":[39],"new":[40],"processors,":[41],"coprocessors,":[42],"interconnects.":[44]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":6}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}