{"id":"https://openalex.org/W2069493778","doi":"https://doi.org/10.1109/mdt.2002.1033791","title":"High defect coverage with low-power test sequences in a BIST environment","display_name":"High defect coverage with low-power test sequences in a BIST environment","publication_year":2002,"publication_date":"2002-09-01","ids":{"openalex":"https://openalex.org/W2069493778","doi":"https://doi.org/10.1109/mdt.2002.1033791","mag":"2069493778"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2002.1033791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1033791","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005116115","display_name":"Patrick Girard","orcid":"https://orcid.org/0000-0003-0722-8772"},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"P. Girard","raw_affiliation_strings":["L.I.R.M.M","Microelectron. Dept., LIRMM, Montpellier, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"L.I.R.M.M","institution_ids":[]},{"raw_affiliation_string":"Microelectron. Dept., LIRMM, Montpellier, France","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071534551","display_name":"C. Landrault","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4405261681"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"C. Landrault","raw_affiliation_strings":["L.I.R.M.M","Laboratoire d'Informatique de Robotique et de Micro\u00e9lectronique de Montpellier"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"L.I.R.M.M","institution_ids":[]},{"raw_affiliation_string":"Laboratoire d'Informatique de Robotique et de Micro\u00e9lectronique de Montpellier","institution_ids":["https://openalex.org/I4210101743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041515093","display_name":"S. Pravossoudovitch","orcid":null},"institutions":[{"id":"https://openalex.org/I4210145979","display_name":"Laboratoire de Conception et d'Int\u00e9gration des Syst\u00e8mes","ror":"https://ror.org/04eg25g76","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I4210145979","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"S. Pravossoudovitch","raw_affiliation_strings":["L.I.R.M.M","Conception et Test de Syst\u00e8mes MICro\u00e9lectroniques"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"L.I.R.M.M","institution_ids":[]},{"raw_affiliation_string":"Conception et Test de Syst\u00e8mes MICro\u00e9lectroniques","institution_ids":["https://openalex.org/I4210145979"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089236739","display_name":"A. Virazel","orcid":"https://orcid.org/0000-0001-7398-7107"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]},{"id":"https://openalex.org/I4210145979","display_name":"Laboratoire de Conception et d'Int\u00e9gration des Syst\u00e8mes","ror":"https://ror.org/04eg25g76","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I4210145979","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["DE","FR"],"is_corresponding":false,"raw_author_name":"A. Virazel","raw_affiliation_strings":["University of Stuttgart, Germany","Conception et Test de Syst\u00e8mes MICro\u00e9lectroniques"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Conception et Test de Syst\u00e8mes MICro\u00e9lectroniques","institution_ids":["https://openalex.org/I4210145979"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008775226","display_name":"Hans-Joachim Wunderlich","orcid":"https://orcid.org/0000-0003-4536-8290"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H.-J. Wunderlich","raw_affiliation_strings":["University of Stuttgart, Germany","Universit\u00e4t Stuttgart , Stuttgart"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]},{"raw_affiliation_string":"Universit\u00e4t Stuttgart , Stuttgart","institution_ids":["https://openalex.org/I100066346"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4111,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.57190064,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"19","issue":"5","first_page":"44","last_page":"52"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.7737169861793518},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6170721650123596},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.562976062297821},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5010764598846436},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.45489779114723206},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.43703144788742065},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3921167850494385},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2779916226863861},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2682218551635742},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.14866903424263},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11579811573028564},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10086891055107117}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.7737169861793518},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6170721650123596},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.562976062297821},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5010764598846436},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.45489779114723206},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.43703144788742065},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3921167850494385},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2779916226863861},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2682218551635742},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.14866903424263},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11579811573028564},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10086891055107117},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/mdt.2002.1033791","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1033791","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test of Computers","raw_type":"journal-article"},{"id":"pmh:oai:HAL:lirmm-00268585v1","is_oa":false,"landing_page_url":"https://hal-lirmm.ccsd.cnrs.fr/lirmm-00268585","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Design & Test, 2002, 19 (5), pp.44-52. ⟨10.1109/MDT.2002.1033791⟩","raw_type":"Journal articles"},{"id":"pmh:oai:informatik.uni-stuttgart.de:ART-2002-09","is_oa":false,"landing_page_url":"http://www2.informatik.uni-stuttgart.de/cgi-bin/NCSTRL/NCSTRL_view.pl?id=ART-2002-09&engl=1","pdf_url":null,"source":{"id":"https://openalex.org/S4306401306","display_name":"Fachbereich Informatik (University of Stuttgart)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I100066346","host_organization_name":"University of Stuttgart","host_organization_lineage":["https://openalex.org/I100066346"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"\\n            In: IEEE Design and Test of Computers. Vol. 19(5), pp. 44-52\\n          ","raw_type":"Text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6899999976158142,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W13277579","https://openalex.org/W1985476435","https://openalex.org/W2043949919","https://openalex.org/W2096007426","https://openalex.org/W2112978605","https://openalex.org/W2119691242","https://openalex.org/W2167925462","https://openalex.org/W2533622023","https://openalex.org/W3099826813","https://openalex.org/W6600530048"],"related_works":["https://openalex.org/W2104478015","https://openalex.org/W1749299286","https://openalex.org/W2117983955","https://openalex.org/W2130782752","https://openalex.org/W2371899012","https://openalex.org/W2130111591","https://openalex.org/W1698454149","https://openalex.org/W2114156871","https://openalex.org/W2129286312","https://openalex.org/W2146091965"],"abstract_inverted_index":{"A":[0],"new":[1],"technique,":[2],"random":[3],"single-input":[4],"change":[5],"(RSIC)":[6],"test":[7,11],"generation,":[8],"generates":[9],"low-power":[10,22],"patterns":[12],"that":[13],"provide":[14],"a":[15,30],"high":[16],"level":[17],"of":[18,24,34],"defect":[19],"coverage":[20],"during":[21],"BIST":[23,32],"digital":[25],"circuits.":[26],"The":[27],"authors":[28],"propose":[29],"parallel":[31],"implementation":[33],"the":[35],"RSIC":[36],"generator":[37],"and":[38],"analyze":[39],"its":[40],"area-overhead":[41],"impact.":[42]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}