{"id":"https://openalex.org/W2038658767","doi":"https://doi.org/10.1109/mdt.2002.1018138","title":"Using formal specifications for functional validation of hardware designs","display_name":"Using formal specifications for functional validation of hardware designs","publication_year":2002,"publication_date":"2002-07-01","ids":{"openalex":"https://openalex.org/W2038658767","doi":"https://doi.org/10.1109/mdt.2002.1018138","mag":"2038658767"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.2002.1018138","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1018138","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037332577","display_name":"Ken D. Shimizu","orcid":"https://orcid.org/0000-0002-0229-6541"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"K. Shimizu","raw_affiliation_strings":["University of Stanford, USA","Stanford University, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"Stanford University, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009458897","display_name":"David L. Dill","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.L. Dill","raw_affiliation_strings":["University of Stanford, USA","Stanford University, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"Stanford University, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5037332577"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":1.0163,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.74538944,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"19","issue":"4","first_page":"96","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.8265238404273987},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7370119690895081},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.6564311981201172},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.6064351797103882},{"id":"https://openalex.org/keywords/formal-specification","display_name":"Formal specification","score":0.605256199836731},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.5863602161407471},{"id":"https://openalex.org/keywords/ambiguity","display_name":"Ambiguity","score":0.49578818678855896},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.48401233553886414},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.46044692397117615},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36758458614349365},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3599352240562439},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1353347897529602}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.8265238404273987},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7370119690895081},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.6564311981201172},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.6064351797103882},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.605256199836731},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.5863602161407471},{"id":"https://openalex.org/C2780522230","wikidata":"https://www.wikidata.org/wiki/Q1140419","display_name":"Ambiguity","level":2,"score":0.49578818678855896},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.48401233553886414},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.46044692397117615},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36758458614349365},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3599352240562439},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1353347897529602},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdt.2002.1018138","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.2002.1018138","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.5899999737739563,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1590315663","https://openalex.org/W1826560318","https://openalex.org/W1866896089","https://openalex.org/W2080267935","https://openalex.org/W2112134383","https://openalex.org/W2118325845","https://openalex.org/W2152056423","https://openalex.org/W2166856993","https://openalex.org/W4234177455","https://openalex.org/W4238131235","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2145025660","https://openalex.org/W2171674700","https://openalex.org/W1922520186","https://openalex.org/W1544097700","https://openalex.org/W1946493810","https://openalex.org/W1553537032","https://openalex.org/W1965327442","https://openalex.org/W1495250406","https://openalex.org/W2118549635","https://openalex.org/W17088386"],"abstract_inverted_index":{"Formal":[0],"specifications":[1,21],"can":[2,22],"help":[3,24],"resolve":[4],"both":[5],"ambiguity":[6],"issues":[7],"and":[8,40],"correctness":[9],"problems":[10],"in":[11],"verifying":[12],"complex":[13],"hardware":[14],"designs.":[15],"This":[16],"new":[17],"methodology":[18],"shows":[19],"how":[20],"also":[23],"design":[25,47],"productivity":[26],"by":[27],"automating":[28],"many":[29],"procedures":[30],"that":[31],"are":[32,50],"now":[33],"done":[34],"manually.":[35],"Input":[36],"sequences,":[37],"output":[38],"assertions,":[39],"a":[41],"simulation":[42],"coverage":[43],"metric":[44],"for":[45],"the":[46,55],"under":[48],"verification":[49],"all":[51],"generated":[52],"directly":[53],"from":[54],"specification.":[56]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
