{"id":"https://openalex.org/W1970112123","doi":"https://doi.org/10.1109/mdt.1984.5005647","title":"A Survey of Hardware Accelerators Used in Computer-Aided Design","display_name":"A Survey of Hardware Accelerators Used in Computer-Aided Design","publication_year":1984,"publication_date":"1984-08-01","ids":{"openalex":"https://openalex.org/W1970112123","doi":"https://doi.org/10.1109/mdt.1984.5005647","mag":"1970112123"},"language":"en","primary_location":{"id":"doi:10.1109/mdt.1984.5005647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.1984.5005647","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091379882","display_name":"Tom Blank","orcid":null},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tom Blank","raw_affiliation_strings":["University of Stanford, USA","Stanford University"],"affiliations":[{"raw_affiliation_string":"University of Stanford, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"Stanford University","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5091379882"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":26.2445,"has_fulltext":false,"cited_by_count":198,"citation_normalized_percentile":{"value":0.99856471,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1","issue":"3","first_page":"21","last_page":"39"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7062394618988037},{"id":"https://openalex.org/keywords/computer-aided-design","display_name":"Computer Aided Design","score":0.44481393694877625},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44246381521224976},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4340578317642212},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4322529733181},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.42225080728530884},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4175453782081604},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23862001299858093}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7062394618988037},{"id":"https://openalex.org/C119823426","wikidata":"https://www.wikidata.org/wiki/Q184793","display_name":"Computer Aided Design","level":2,"score":0.44481393694877625},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44246381521224976},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4340578317642212},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4322529733181},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.42225080728530884},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4175453782081604},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23862001299858093}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdt.1984.5005647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdt.1984.5005647","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W40541914","https://openalex.org/W1482973734","https://openalex.org/W1615697975","https://openalex.org/W1649115910","https://openalex.org/W1887169337","https://openalex.org/W1924916937","https://openalex.org/W1967575124","https://openalex.org/W1970214992","https://openalex.org/W1981023557","https://openalex.org/W1984398778","https://openalex.org/W1988286948","https://openalex.org/W2006168247","https://openalex.org/W2010948284","https://openalex.org/W2046614629","https://openalex.org/W2049828765","https://openalex.org/W2050831047","https://openalex.org/W2083772386","https://openalex.org/W2095586109","https://openalex.org/W2098525454","https://openalex.org/W2125076291","https://openalex.org/W2142307378","https://openalex.org/W2144977947","https://openalex.org/W2148752144","https://openalex.org/W2153580689","https://openalex.org/W2164357943","https://openalex.org/W2479192807","https://openalex.org/W2625364807","https://openalex.org/W3138807513","https://openalex.org/W4205739732","https://openalex.org/W4231288534","https://openalex.org/W4239042952","https://openalex.org/W4244395203","https://openalex.org/W4245110061","https://openalex.org/W4246174232","https://openalex.org/W4247476002","https://openalex.org/W4249665609","https://openalex.org/W4250631145","https://openalex.org/W4252142323","https://openalex.org/W4253013447","https://openalex.org/W4285719527","https://openalex.org/W6636682163","https://openalex.org/W6640428638","https://openalex.org/W6681218852","https://openalex.org/W6739650848"],"related_works":["https://openalex.org/W2070860984","https://openalex.org/W2030146854","https://openalex.org/W4312076519","https://openalex.org/W222450000","https://openalex.org/W2045676156","https://openalex.org/W2094776328","https://openalex.org/W4313135393","https://openalex.org/W193572360","https://openalex.org/W2093134072","https://openalex.org/W4388039934"],"abstract_inverted_index":{"Hardware":[0],"accelerators,":[1],"or":[2],"special-purpose":[3,113],"engines,":[4],"have":[5,22],"been":[6,23],"used":[7],"in":[8],"computer-aided":[9],"design":[10,33,96],"applications":[11],"for":[12,28,95],"nearly":[13],"20":[14,20],"years.":[15],"In":[16],"this":[17],"time,":[18],"roughly":[19,80],"machines":[21,45,56],"built":[24],"and":[25,37,43,61,71,89,105],"tested":[26],"specifically":[27],"such":[29],"purposes":[30],"as":[31],"simulation,":[32],"rule":[34,97],"checking,":[35],"placement,":[36],"routing.":[38],"Their":[39],"uses":[40],"are":[41,46],"increasing,":[42],"the":[44,55,110],"becoming":[47],"commercially":[48],"available.":[49],"This":[50],"survey":[51],"describes":[52],"not":[53],"only":[54],"but":[57],"also":[58,64],"their":[59],"problems":[60],"limitations.":[62],"It":[63],"gives":[65],"comparative":[66],"data":[67],"on":[68],"speed-up":[69,83],"techniques":[70],"performance.":[72],"Examples":[73],"include":[74],"a":[75,81,85,90,101],"simulation":[76],"machine":[77,94],"that":[78,99],"achieves":[79],"million-times":[82],"over":[84],"conventional":[86],"1-MIP":[87],"mainframe":[88],"very":[91],"low":[92],"cost":[93],"checking":[98],"provides":[100],"100-times":[102],"improvement.":[103],"These":[104],"other":[106],"examples":[107],"clearly":[108],"demonstrate":[109],"viability":[111],"of":[112],"engines.":[114]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
