{"id":"https://openalex.org/W4416707393","doi":"https://doi.org/10.1109/mdat.2025.3637710","title":"The Fault in Our Chips: A Survey on Edge AI Accelerator Vulnerabilities","display_name":"The Fault in Our Chips: A Survey on Edge AI Accelerator Vulnerabilities","publication_year":2025,"publication_date":"2025-11-26","ids":{"openalex":"https://openalex.org/W4416707393","doi":"https://doi.org/10.1109/mdat.2025.3637710"},"language":null,"primary_location":{"id":"doi:10.1109/mdat.2025.3637710","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2025.3637710","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066094401","display_name":"Shamik Kundu","orcid":"https://orcid.org/0000-0002-5992-8554"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shamik Kundu","raw_affiliation_strings":["Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-5992-8554","affiliations":[{"raw_affiliation_string":"Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102596067","display_name":"Sanjay Das","orcid":"https://orcid.org/0009-0005-4259-1915"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sanjay Das","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0009-0005-4259-1915","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025159226","display_name":"Anand Menon","orcid":"https://orcid.org/0000-0002-0304-6528"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Menon","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0009-0008-1049-3036","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Swastik Bhattacharya","orcid":"https://orcid.org/0000-0003-2904-9388"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Swastik Bhattacharya","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0003-2904-9388","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066464351","display_name":"Arnab Raha","orcid":"https://orcid.org/0000-0002-8848-1069"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arnab Raha","raw_affiliation_strings":["Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-8848-1069","affiliations":[{"raw_affiliation_string":"Advanced Architecture Research Group, Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066320524","display_name":"Kanad Basu","orcid":"https://orcid.org/0000-0002-6431-7512"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kanad Basu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-6431-7512","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2831,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.8671052,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"43","issue":"4","first_page":"8","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.4505999982357025,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.4505999982357025,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.2741999924182892,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.11270000040531158,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.7842000126838684},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.7077999711036682},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6449000239372253},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5396000146865845},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.4546999931335449},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.43970000743865967},{"id":"https://openalex.org/keywords/edge-device","display_name":"Edge device","score":0.4083999991416931},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.3991999924182892}],"concepts":[{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.7842000126838684},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.7077999711036682},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6449000239372253},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5396000146865845},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5001000165939331},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.4546999931335449},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4422000050544739},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.43970000743865967},{"id":"https://openalex.org/C138236772","wikidata":"https://www.wikidata.org/wiki/Q25098575","display_name":"Edge device","level":3,"score":0.4083999991416931},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.3991999924182892},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3637999892234802},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3555999994277954},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.3513999879360199},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.3492000102996826},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.3361000120639801},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.3140000104904175},{"id":"https://openalex.org/C50712370","wikidata":"https://www.wikidata.org/wiki/Q4269346","display_name":"Software fault tolerance","level":3,"score":0.30559998750686646},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.30329999327659607},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.27129998803138733},{"id":"https://openalex.org/C2778456923","wikidata":"https://www.wikidata.org/wiki/Q5337692","display_name":"Edge computing","level":3,"score":0.2662999927997589},{"id":"https://openalex.org/C95713431","wikidata":"https://www.wikidata.org/wiki/Q631425","display_name":"Vulnerability (computing)","level":2,"score":0.258899986743927}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2025.3637710","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2025.3637710","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Edge":[0],"AI":[1,80,152],"accelerators,":[2,81],"such":[3],"as":[4],"TPUs,":[5],"NPUs,":[6],"and":[7,26,36,95,98,106,140,158],"custom":[8],"low-power":[9],"ASICs\u2014are":[10],"increasingly":[11],"used":[12],"in":[13,24,39,79,118],"real-time,":[14],"battery-operated":[15],"systems":[16,41],"for":[17],"on-device":[18],"deep":[19],"learning.":[20],"However,":[21],"their":[22],"deployment":[23,88],"resource-constrained":[25],"physically":[27],"exposed":[28],"environments":[29],"raises":[30],"serious":[31],"concerns":[32],"about":[33],"hardware":[34,77,153],"reliability":[35,139],"security.":[37,141],"Faults":[38],"these":[40],"can":[42,129],"be":[43,131],"transient":[44],"(<italic":[45,55],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[46,56],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">e.g.</i>,":[47,57],"due":[48],"to":[49,145],"voltage":[50],"fluctuations":[51],"or":[52,59,62],"radiation),":[53],"permanent":[54],"aging":[58],"manufacturing":[60],"defects),":[61],"even":[63],"adversarially":[64],"induced":[65],"through":[66],"targeted":[67],"bit-flip":[68],"attacks.":[69],"This":[70],"survey":[71],"provides":[72],"a":[73,83],"comprehensive":[74],"overview":[75],"of":[76,149,155],"faults":[78,125],"with":[82],"particular":[84],"focus":[85],"on":[86,114],"edge":[87,128,151],"scenarios.We":[89],"examine":[90],"the":[91,127,136,147],"fault":[92,116,160],"models,":[93],"detection":[94],"mitigation":[96],"techniques,":[97],"unique":[99],"challenges":[100],"posed":[101],"by":[102],"limited":[103],"on-chip":[104],"resources":[105],"real-time":[107],"constraints.":[108],"Unlike":[109],"prior":[110],"surveys":[111],"focusing":[112],"mainly":[113],"random":[115],"tolerance":[117],"general-purpose":[119],"settings,":[120],"our":[121],"work":[122],"highlights":[123],"how":[124],"at":[126],"also":[130],"intentional":[132],"attack":[133],"vectors,":[134],"blurring":[135],"line":[137],"between":[138],"The":[142],"goal":[143],"is":[144],"guide":[146],"development":[148],"resilient":[150],"capable":[154],"withstanding":[156],"natural":[157],"malicious":[159],"events.":[161]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-17T05:52:16.776730","created_date":"2025-11-27T00:00:00"}
