{"id":"https://openalex.org/W7125643508","doi":"https://doi.org/10.1109/mdat.2025.3615801","title":"Celebrating Three Decades of IEEE/ACM International Symposium on Low Power Electronics and Design","display_name":"Celebrating Three Decades of IEEE/ACM International Symposium on Low Power Electronics and Design","publication_year":2026,"publication_date":"2026-01-23","ids":{"openalex":"https://openalex.org/W7125643508","doi":"https://doi.org/10.1109/mdat.2025.3615801"},"language":null,"primary_location":{"id":"doi:10.1109/mdat.2025.3615801","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2025.3615801","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109341501","display_name":"Kapil Dev","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kapil Dev","raw_affiliation_strings":["Nvidia Corporation, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Nvidia Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108301209","display_name":"Jerald Yoo","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jerald Yoo","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5123808706","display_name":"Younghyun Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Younghyun Kim","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109355089","display_name":"Srividhya Venkataraman","orcid":null},"institutions":[{"id":"https://openalex.org/I16269868","display_name":"Santa Clara University","ror":"https://ror.org/03ypqe447","country_code":"US","type":"education","lineage":["https://openalex.org/I16269868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Srividhya Venkataraman","raw_affiliation_strings":["CPU Cores Design Team, AMD, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"CPU Cores Design Team, AMD, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I16269868"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5109341501"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.4296186,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"43","issue":"1","first_page":"83","last_page":"86"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.07620000094175339,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.07620000094175339,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.03099999949336052,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.025699999183416367,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44859999418258667},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.44530001282691956},{"id":"https://openalex.org/keywords/power-electronics","display_name":"Power electronics","score":0.3725000023841858},{"id":"https://openalex.org/keywords/work","display_name":"Work (physics)","score":0.2971999943256378}],"concepts":[{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.6211000084877014},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44859999418258667},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.44530001282691956},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4235000014305115},{"id":"https://openalex.org/C178911571","wikidata":"https://www.wikidata.org/wiki/Q593143","display_name":"Power electronics","level":3,"score":0.3725000023841858},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.2971999943256378},{"id":"https://openalex.org/C61696701","wikidata":"https://www.wikidata.org/wiki/Q770766","display_name":"Engineering physics","level":1,"score":0.2678000032901764},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.26570001244544983},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.25690001249313354},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2517000138759613}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2025.3615801","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2025.3615801","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-01-26T23:10:34.858540","created_date":"2026-01-26T00:00:00"}