{"id":"https://openalex.org/W4391582715","doi":"https://doi.org/10.1109/mdat.2024.3363085","title":"Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs","display_name":"Efficient Aspect Verification and Debugging of High-Performance Microprocessor Designs","publication_year":2024,"publication_date":"2024-02-06","ids":{"openalex":"https://openalex.org/W4391582715","doi":"https://doi.org/10.1109/mdat.2024.3363085"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2024.3363085","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mdat.2024.3363085","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031339747","display_name":"Arun Joseph","orcid":"https://orcid.org/0000-0003-4685-8929"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Arun Joseph","raw_affiliation_strings":["IBM Infrastructure, Bengaluru, India"],"raw_orcid":"https://orcid.org/0000-0003-4685-8929","affiliations":[{"raw_affiliation_string":"IBM Infrastructure, Bengaluru, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021974963","display_name":"Pretty Mariam Jacob","orcid":"https://orcid.org/0009-0001-5201-5525"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pretty Mariam Jacob","raw_affiliation_strings":["IBM Infrastructure, Bengaluru, India"],"raw_orcid":"https://orcid.org/0009-0001-5201-5525","affiliations":[{"raw_affiliation_string":"IBM Infrastructure, Bengaluru, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074730505","display_name":"Matthias Klein","orcid":"https://orcid.org/0000-0002-0434-5888"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Matthias Klein","raw_affiliation_strings":["IBM Infrastructure, Bengaluru, India"],"raw_orcid":"https://orcid.org/0000-0002-0434-5888","affiliations":[{"raw_affiliation_string":"IBM Infrastructure, Bengaluru, India","institution_ids":["https://openalex.org/I4210129961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064770930","display_name":"Wolfgang Roesner","orcid":"https://orcid.org/0009-0004-5483-3371"},"institutions":[{"id":"https://openalex.org/I4210129961","display_name":"IBM (India)","ror":"https://ror.org/034ahpr11","country_code":"IN","type":"company","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210129961"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Wolfgang Roesner","raw_affiliation_strings":["IBM Infrastructure, Bengaluru, India"],"raw_orcid":"https://orcid.org/0009-0004-5483-3371","affiliations":[{"raw_affiliation_string":"IBM Infrastructure, Bengaluru, India","institution_ids":["https://openalex.org/I4210129961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210129961"],"apc_list":null,"apc_paid":null,"fwci":0.7901,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6535965,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"41","issue":"3","first_page":"36","last_page":"46"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8028705716133118},{"id":"https://openalex.org/keywords/firmware","display_name":"Firmware","score":0.734744668006897},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6752760410308838},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6513791084289551},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.5966886281967163},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.533744215965271},{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.5087018609046936},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5062007308006287},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5044909715652466},{"id":"https://openalex.org/keywords/background-debug-mode-interface","display_name":"Background debug mode interface","score":0.4783436954021454},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4657844603061676},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.45249906182289124},{"id":"https://openalex.org/keywords/reusability","display_name":"Reusability","score":0.4266829490661621},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.410857617855072},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.29570502042770386},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1560761034488678}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8028705716133118},{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.734744668006897},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6752760410308838},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6513791084289551},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.5966886281967163},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.533744215965271},{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.5087018609046936},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5062007308006287},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5044909715652466},{"id":"https://openalex.org/C124774103","wikidata":"https://www.wikidata.org/wiki/Q4839640","display_name":"Background debug mode interface","level":3,"score":0.4783436954021454},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4657844603061676},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.45249906182289124},{"id":"https://openalex.org/C137981799","wikidata":"https://www.wikidata.org/wiki/Q1369184","display_name":"Reusability","level":3,"score":0.4266829490661621},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.410857617855072},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29570502042770386},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1560761034488678},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2024.3363085","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/mdat.2024.3363085","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2120072298","https://openalex.org/W2168415383","https://openalex.org/W2809062524","https://openalex.org/W2809273888","https://openalex.org/W3026448768","https://openalex.org/W3101211091","https://openalex.org/W3207736238","https://openalex.org/W4220820361","https://openalex.org/W4298395725","https://openalex.org/W6772606762"],"related_works":["https://openalex.org/W4288628075","https://openalex.org/W2913859679","https://openalex.org/W2123076670","https://openalex.org/W4312911728","https://openalex.org/W2126475478","https://openalex.org/W2993028905","https://openalex.org/W3107591246","https://openalex.org/W2543290882","https://openalex.org/W2157878629","https://openalex.org/W2326620043"],"abstract_inverted_index":{"In":[0],"this":[1],"article,":[2],"the":[3,6,24,27,43],"authors":[4,25],"analyze":[5],"impact":[7,28],"of":[8,29,45],"aspect-oriented":[9],"design":[10,44],"(AOD)":[11],"techniques":[12],"to":[13],"separate":[14],"nonmainline":[15],"hardware":[16],"aspects":[17],"such":[18],"as":[19],"clocking,":[20],"arrays,":[21],"etc.":[22],"Particularly,":[23],"demonstrate":[26],"AOD":[30],"on":[31],"IBM":[32],"Power10":[33],"processor.":[34],"This":[35],"article":[36],"is":[37],"an":[38],"extremely":[39],"important":[40],"study":[41],"in":[42],"large-scale":[46],"supercomputers.":[47]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2025-12-25T23:11:45.687758","created_date":"2025-10-10T00:00:00"}