{"id":"https://openalex.org/W3128516589","doi":"https://doi.org/10.1109/mdat.2021.3051334","title":"An Open-Source EDA Flow for Asynchronous Logic","display_name":"An Open-Source EDA Flow for Asynchronous Logic","publication_year":2021,"publication_date":"2021-02-09","ids":{"openalex":"https://openalex.org/W3128516589","doi":"https://doi.org/10.1109/mdat.2021.3051334","mag":"3128516589"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2021.3051334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2021.3051334","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013842248","display_name":"Samira Ataei","orcid":null},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samira Ataei","raw_affiliation_strings":["Yale University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yale University, USA","institution_ids":["https://openalex.org/I32971472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015429758","display_name":"Wenmian Hua","orcid":"https://orcid.org/0000-0001-8511-7539"},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wenmian Hua","raw_affiliation_strings":["Yale University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yale University, USA","institution_ids":["https://openalex.org/I32971472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112898449","display_name":"Yihang Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yihang Yang","raw_affiliation_strings":["Yale University, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yale University, USA","institution_ids":["https://openalex.org/I32971472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002575415","display_name":"Rajit Manohar","orcid":"https://orcid.org/0000-0001-8211-6602"},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajit Manohar","raw_affiliation_strings":["Computer Systems Lab, Yale University, New Haven, CT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Lab, Yale University, New Haven, CT, USA","institution_ids":["https://openalex.org/I32971472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021726030","display_name":"Yi-Shan Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yi-Shan Lu","raw_affiliation_strings":["University of Texas at Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100509174","display_name":"Jiayuan He","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiayuan He","raw_affiliation_strings":["University of Texas at Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014285564","display_name":"Sepideh Maleki","orcid":"https://orcid.org/0000-0002-6508-8061"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sepideh Maleki","raw_affiliation_strings":["University of Texas at Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013181067","display_name":"Keshav Pingali","orcid":"https://orcid.org/0000-0002-0484-4636"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Keshav Pingali","raw_affiliation_strings":["University of Texas at Austin, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2204,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.78230145,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"38","issue":"2","first_page":"27","last_page":"37"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8661403656005859},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.8610657453536987},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6962714195251465},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5555397868156433},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5297546982765198},{"id":"https://openalex.org/keywords/open-source","display_name":"Open source","score":0.5075246095657349},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.49902796745300293},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4429440498352051},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4418479800224304},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4288312792778015},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4201525151729584},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41273748874664307},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21847504377365112},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21192699670791626},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.18513339757919312},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16178256273269653},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15360990166664124},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14785221219062805},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13282954692840576},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.07720676064491272}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8661403656005859},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.8610657453536987},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6962714195251465},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5555397868156433},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5297546982765198},{"id":"https://openalex.org/C3018397939","wikidata":"https://www.wikidata.org/wiki/Q3644502","display_name":"Open source","level":3,"score":0.5075246095657349},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.49902796745300293},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4429440498352051},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4418479800224304},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4288312792778015},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4201525151729584},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41273748874664307},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21847504377365112},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21192699670791626},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.18513339757919312},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16178256273269653},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15360990166664124},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14785221219062805},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13282954692840576},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.07720676064491272},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2021.3051334","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2021.3051334","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2702044909","display_name":null,"funder_award_id":"FA8650-18-2-7850","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W1546335040","https://openalex.org/W1604973310","https://openalex.org/W1606871744","https://openalex.org/W1989093424","https://openalex.org/W2010800225","https://openalex.org/W2027484829","https://openalex.org/W2034102265","https://openalex.org/W2035560780","https://openalex.org/W2054242451","https://openalex.org/W2097453879","https://openalex.org/W2098903349","https://openalex.org/W2104105510","https://openalex.org/W2105917387","https://openalex.org/W2106299112","https://openalex.org/W2110425399","https://openalex.org/W2116603646","https://openalex.org/W2121914493","https://openalex.org/W2122144558","https://openalex.org/W2124501077","https://openalex.org/W2132385281","https://openalex.org/W2134829921","https://openalex.org/W2149534087","https://openalex.org/W2159960858","https://openalex.org/W2161331676","https://openalex.org/W2343527030","https://openalex.org/W2496543017","https://openalex.org/W2537959404","https://openalex.org/W2607359301","https://openalex.org/W2619979665","https://openalex.org/W2767956243","https://openalex.org/W2899805943","https://openalex.org/W2977344565","https://openalex.org/W2977387063","https://openalex.org/W2998039965","https://openalex.org/W2998517322","https://openalex.org/W3082122032","https://openalex.org/W3105140593","https://openalex.org/W3112254183","https://openalex.org/W4211008702","https://openalex.org/W4232836277","https://openalex.org/W4237268544","https://openalex.org/W4252769808","https://openalex.org/W6679654111","https://openalex.org/W6772076169"],"related_works":["https://openalex.org/W1984298705","https://openalex.org/W2386022279","https://openalex.org/W4247130854","https://openalex.org/W2384756109","https://openalex.org/W2237508561","https://openalex.org/W142017057","https://openalex.org/W2363153189","https://openalex.org/W2243536805","https://openalex.org/W1592424226","https://openalex.org/W2152365648"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"an":[3],"open-source":[4],"EDA":[5],"flow":[6],"for":[7],"digital":[8],"asynchronous":[9,18],"circuits,":[10],"capable":[11],"of":[12,17],"supporting":[13],"many":[14],"different":[15],"families":[16,20],"circuit":[19],"from":[21],"logic":[22],"synthesis":[23],"all":[24],"the":[25],"way":[26],"down":[27],"to":[28],"GDSII.":[29]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":4}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
