{"id":"https://openalex.org/W2949730593","doi":"https://doi.org/10.1109/mdat.2019.2910138","title":"Implications of On-Chip Single-Source Clocking on High-Speed Serial Interfaces in Network SoC","display_name":"Implications of On-Chip Single-Source Clocking on High-Speed Serial Interfaces in Network SoC","publication_year":2019,"publication_date":"2019-07-19","ids":{"openalex":"https://openalex.org/W2949730593","doi":"https://doi.org/10.1109/mdat.2019.2910138","mag":"2949730593"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2019.2910138","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2019.2910138","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010074259","display_name":"Maneesh Kumar Pandey","orcid":"https://orcid.org/0000-0002-8110-5685"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Maneesh Kumar Pandey","raw_affiliation_strings":["NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020326678","display_name":"Tuhina Gupta","orcid":"https://orcid.org/0000-0002-8996-218X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tuhina Gupta","raw_affiliation_strings":["NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112442942","display_name":"Pallavi Raj","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pallavi Raj","raw_affiliation_strings":["NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India"],"affiliations":[{"raw_affiliation_string":"NXP Semiconductor, Sector-16A, Noida, Uttar Pradesh, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020173536","display_name":"Rohit Sharma","orcid":"https://orcid.org/0000-0002-7795-7551"},"institutions":[{"id":"https://openalex.org/I119241673","display_name":"Indian Institute of Technology Ropar","ror":"https://ror.org/02qkhhn56","country_code":"IN","type":"education","lineage":["https://openalex.org/I119241673"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rohit Sharma","raw_affiliation_strings":["Indian Institute of Technology Ropar"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Ropar","institution_ids":["https://openalex.org/I119241673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5010074259"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1854,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.54031469,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"36","issue":"4","first_page":"48","last_page":"56"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6626167297363281},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5887928605079651},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.551295816898346},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5341234803199768},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.49753978848457336},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.374300092458725},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11307963728904724}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6626167297363281},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5887928605079651},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.551295816898346},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5341234803199768},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.49753978848457336},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.374300092458725},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11307963728904724}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2019.2910138","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2019.2910138","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W89584938","https://openalex.org/W1783793075","https://openalex.org/W1984219569","https://openalex.org/W2043112269","https://openalex.org/W2045051338","https://openalex.org/W2045749211","https://openalex.org/W2083682264","https://openalex.org/W2123100865","https://openalex.org/W2139132358","https://openalex.org/W2147586450","https://openalex.org/W2169458783","https://openalex.org/W2277758645","https://openalex.org/W2280574045","https://openalex.org/W2614733153","https://openalex.org/W2615706834","https://openalex.org/W2664750394","https://openalex.org/W4240672058","https://openalex.org/W6681624535","https://openalex.org/W6737217102"],"related_works":["https://openalex.org/W2036806516","https://openalex.org/W1967394420","https://openalex.org/W2565425548","https://openalex.org/W2388672758","https://openalex.org/W2135981148","https://openalex.org/W2392009442","https://openalex.org/W2155685366","https://openalex.org/W2142443274","https://openalex.org/W13556768","https://openalex.org/W2912613323"],"abstract_inverted_index":{"Editor's":[0],"note:":[1],"Single-source":[2],"clocking":[3,20,25],"is":[4],"important":[5],"for":[6],"networked":[7],"SoC":[8,38],"architectures.":[9],"This":[10],"article":[11],"discusses":[12],"the":[13,23],"validation":[14],"challenges":[15],"related":[16],"to":[17,22],"on-chip":[18],"single-source":[19],"due":[21],"distributed":[24],"trends":[26],"of":[27],"recent":[28],"SoCs":[29],"and":[30,36],"proposes":[31],"a":[32],"new":[33],"low":[34],"cost":[35],"no":[37],"re-spin":[39],"solution.":[40]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}