{"id":"https://openalex.org/W2783090121","doi":"https://doi.org/10.1109/mdat.2018.2791809","title":"A Multicore Processor for Time-Critical Applications","display_name":"A Multicore Processor for Time-Critical Applications","publication_year":2018,"publication_date":"2018-01-10","ids":{"openalex":"https://openalex.org/W2783090121","doi":"https://doi.org/10.1109/mdat.2018.2791809","mag":"2783090121"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2018.2791809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2018.2791809","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://orbit.dtu.dk/en/publications/bdb51729-5c89-4a00-a170-f340811f6aae","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083205602","display_name":"Martin Schoeberl","orcid":"https://orcid.org/0000-0003-2366-382X"},"institutions":[{"id":"https://openalex.org/I96673099","display_name":"Technical University of Denmark","ror":"https://ror.org/04qtj9h94","country_code":"DK","type":"education","lineage":["https://openalex.org/I96673099"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Martin Schoeberl","raw_affiliation_strings":["Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2800 Kgs, Lyngby, Denmark"],"raw_orcid":"https://orcid.org/0000-0003-2366-382X","affiliations":[{"raw_affiliation_string":"Department of Applied Mathematics and Computer Science, Technical University of Denmark, 2800 Kgs, Lyngby, Denmark","institution_ids":["https://openalex.org/I96673099"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033388505","display_name":"Luca Pezzarossa","orcid":"https://orcid.org/0000-0002-0863-2526"},"institutions":[{"id":"https://openalex.org/I96673099","display_name":"Technical University of Denmark","ror":"https://ror.org/04qtj9h94","country_code":"DK","type":"education","lineage":["https://openalex.org/I96673099"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Luca Pezzarossa","raw_affiliation_strings":["Technical University of Denmark"],"raw_orcid":"https://orcid.org/0000-0002-0863-2526","affiliations":[{"raw_affiliation_string":"Technical University of Denmark","institution_ids":["https://openalex.org/I96673099"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055051850","display_name":"Jens Spars\u00f8","orcid":"https://orcid.org/0000-0002-0961-9438"},"institutions":[{"id":"https://openalex.org/I96673099","display_name":"Technical University of Denmark","ror":"https://ror.org/04qtj9h94","country_code":"DK","type":"education","lineage":["https://openalex.org/I96673099"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Jens Sparso","raw_affiliation_strings":["Technical University of Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technical University of Denmark","institution_ids":["https://openalex.org/I96673099"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I96673099"],"apc_list":null,"apc_paid":null,"fwci":2.3716,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.89268278,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"35","issue":"2","first_page":"38","last_page":"47"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.828838050365448},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6426186561584473},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4191932678222656},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3625510334968567},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33818405866622925}],"concepts":[{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.828838050365448},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6426186561584473},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4191932678222656},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3625510334968567},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33818405866622925}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mdat.2018.2791809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2018.2791809","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},{"id":"pmh:oai:pure.atira.dk:publications/bdb51729-5c89-4a00-a170-f340811f6aae","is_oa":true,"landing_page_url":"https://orbit.dtu.dk/en/publications/bdb51729-5c89-4a00-a170-f340811f6aae","pdf_url":null,"source":{"id":"https://openalex.org/S4306400705","display_name":"Technical University of Denmark, DTU Orbit (Technical University of Denmark, DTU)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I96673099","host_organization_name":"Technical University of Denmark","host_organization_lineage":["https://openalex.org/I96673099"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Schoeberl , M , Pezzarossa , L &amp; Spars\u00f8 , J 2018 , ' A multicore processor for time-critical applications ' , I E E E Design &amp; Test , vol. 35 , no. 2 , pp. 38-47 . https://doi.org/10.1109/MDAT.2018.2791809","raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:pure.atira.dk:publications/bdb51729-5c89-4a00-a170-f340811f6aae","is_oa":true,"landing_page_url":"https://orbit.dtu.dk/en/publications/bdb51729-5c89-4a00-a170-f340811f6aae","pdf_url":null,"source":{"id":"https://openalex.org/S4306400705","display_name":"Technical University of Denmark, DTU Orbit (Technical University of Denmark, DTU)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I96673099","host_organization_name":"Technical University of Denmark","host_organization_lineage":["https://openalex.org/I96673099"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Schoeberl , M , Pezzarossa , L &amp; Spars\u00f8 , J 2018 , ' A multicore processor for time-critical applications ' , I E E E Design &amp; Test , vol. 35 , no. 2 , pp. 38-47 . https://doi.org/10.1109/MDAT.2018.2791809","raw_type":"article"},"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1978054178","https://openalex.org/W2012999152","https://openalex.org/W2020607902","https://openalex.org/W2029279820","https://openalex.org/W2041938674","https://openalex.org/W2069195425","https://openalex.org/W2076285066","https://openalex.org/W2105996829","https://openalex.org/W2119699246","https://openalex.org/W2151653149","https://openalex.org/W2165683591","https://openalex.org/W2592057604"],"related_works":["https://openalex.org/W1993191611","https://openalex.org/W2023938924","https://openalex.org/W2918840249","https://openalex.org/W1991859582","https://openalex.org/W2110053126","https://openalex.org/W2079303253","https://openalex.org/W2104702637","https://openalex.org/W4248099758","https://openalex.org/W2979015021","https://openalex.org/W3023876411"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"T-CREST":[3],"many-core":[4],"architecture":[5],"specially":[6],"designed":[7],"and":[8],"optimized":[9],"for":[10],"time-critical":[11],"systems.":[12],"-Tulika":[13],"Mitra,":[14],"National":[15],"University":[16],"of":[17],"Singapore":[18],"-J\u00fcrgen":[19],"Teich,":[20],"Friedrich-Alexander-Universit\u00e4t":[21],"Erlangen-N\u00fcrnber":[22],"-Lothar":[23],"Thiele,":[24],"ETH":[25],"Zurich.":[26]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":4}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
