{"id":"https://openalex.org/W2738073699","doi":"https://doi.org/10.1109/mdat.2017.2729938","title":"Guest Editors\u2019 Introduction: Emerging Challenges and Solutions in SoC Verification","display_name":"Guest Editors\u2019 Introduction: Emerging Challenges and Solutions in SoC Verification","publication_year":2017,"publication_date":"2017-07-20","ids":{"openalex":"https://openalex.org/W2738073699","doi":"https://doi.org/10.1109/mdat.2017.2729938","mag":"2738073699"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2017.2729938","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2017.2729938","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"editorial","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011349515","display_name":"Magdy S. Abadir","orcid":"https://orcid.org/0000-0003-4046-2472"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Magdy Abadir","raw_affiliation_strings":["Helic Inc., Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Helic Inc., Austin, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108510816","display_name":"Jayanta Bhadra","orcid":null},"institutions":[{"id":"https://openalex.org/I4210123704","display_name":"NXP (Germany)","ror":"https://ror.org/0268h4j55","country_code":"DE","type":"company","lineage":["https://openalex.org/I109147379","https://openalex.org/I4210123704"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jayanta Bhadra","raw_affiliation_strings":["NXP Semiconductors Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Semiconductors Inc","institution_ids":["https://openalex.org/I4210123704"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101721919","display_name":"Wen Chen","orcid":"https://orcid.org/0000-0002-4437-1765"},"institutions":[{"id":"https://openalex.org/I4210123704","display_name":"NXP (Germany)","ror":"https://ror.org/0268h4j55","country_code":"DE","type":"company","lineage":["https://openalex.org/I109147379","https://openalex.org/I4210123704"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wen Chen","raw_affiliation_strings":["NXP Semiconductors Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Semiconductors Inc","institution_ids":["https://openalex.org/I4210123704"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100369642","display_name":"Li-C. Wang","orcid":"https://orcid.org/0000-0003-4851-8004"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li-C Wang","raw_affiliation_strings":["University of California at Santa Barbara"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California at Santa Barbara","institution_ids":["https://openalex.org/I154570441"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"5","first_page":"5","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7150683403015137},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5511559247970581},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5005965232849121},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.47415798902511597},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.464277446269989},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.4512998163700104},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.43878427147865295},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.43589073419570923},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42216426134109497},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4169740080833435},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.41621583700180054},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4137366712093353},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3514164984226227},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17389512062072754},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.14095407724380493},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10423451662063599}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7150683403015137},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5511559247970581},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5005965232849121},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.47415798902511597},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.464277446269989},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.4512998163700104},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.43878427147865295},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.43589073419570923},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42216426134109497},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4169740080833435},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.41621583700180054},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4137366712093353},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3514164984226227},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17389512062072754},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.14095407724380493},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10423451662063599},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C186846655","wikidata":"https://www.wikidata.org/wiki/Q3398377","display_name":"Software construction","level":4,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2017.2729938","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2017.2729938","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6299999952316284,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3120172095","https://openalex.org/W4375857205","https://openalex.org/W2105593427","https://openalex.org/W2106507440","https://openalex.org/W4389429005","https://openalex.org/W2116002481","https://openalex.org/W2376450564","https://openalex.org/W2536819812","https://openalex.org/W2559043217","https://openalex.org/W1585773602"],"abstract_inverted_index":{"Verification":[0],"has":[1,122],"been":[2],"one":[3,28],"of":[4,30,57,71,93],"the":[5,17,31,46,58,89,103,115,120,138,148,151,159,162],"major":[6],"bottlenecks":[7],"in":[8,132],"integrated":[9,83],"circuit":[10],"design":[11,19,24],"process,":[12],"which":[13,75,110,136],"is":[14,26,49,65,144],"exacerbated":[15],"by":[16],"sheering":[18],"complexities":[20,56],"nowadays.":[21],"The":[22],"increased":[23],"size":[25],"only":[27],"dimension":[29],"growing":[32,90],"complexities.":[33,116],"Recent":[34],"System-on-Chips":[35],"(SoC)":[36],"often":[37],"feature":[38],"multiple":[39],"heterogeneous":[40,47],"embedded":[41],"processors":[42],"and":[43,61,98,108,161],"accelerators.":[44],"While":[45],"architecture":[48],"more":[50],"power":[51],"efficient,":[52],"it":[53],"adds":[54,111],"verification":[55,149,155],"hardware/software":[59],"interaction":[60],"interconnect":[62],"coherency.":[63],"It":[64],"common":[66],"that":[67],"tens":[68],"or":[69],"hundreds":[70],"IP":[72],"blocks,":[73],"among":[74],"analog":[76],"IPs":[77],"occupy":[78],"an":[79],"increasing":[80],"portion,":[81],"are":[82],"into":[84],"a":[85,118,133],"single":[86],"chip.":[87],"Moreover,":[88],"market":[91],"shares":[92],"devices":[94],"for":[95,105,126,153],"Internet-of-Things":[96],"(IoT)":[97],"automotive":[99],"applications":[100],"have":[101],"signified":[102],"requirements":[104],"verifying":[106,128],"security":[107],"safety,":[109],"new":[112],"dimensions":[113],"to":[114,146,157],"As":[117],"result,":[119],"industry":[121],"encountered":[123],"emerging":[124],"challenges":[125],"correctly":[127],"increasingly":[129],"complex":[130],"SoCs":[131],"timely":[134],"manner,":[135],"create":[137],"\u201cverification":[139],"gap.\u201d":[140],"This":[141],"special":[142],"issue":[143],"devoted":[145],"address":[147],"challenges,":[150],"needs":[152],"advanced":[154],"technologies":[156],"close":[158],"gap,":[160],"state-of-the-art":[163],"solutions.":[164]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
