{"id":"https://openalex.org/W2497857214","doi":"https://doi.org/10.1109/mdat.2016.2593399","title":"Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits","display_name":"Using Presilicon Knowledge to Excite Nonlinear Failure Modes in Large Mixed-Signal Circuits","publication_year":2016,"publication_date":"2016-07-19","ids":{"openalex":"https://openalex.org/W2497857214","doi":"https://doi.org/10.1109/mdat.2016.2593399","mag":"2497857214"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2016.2593399","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2016.2593399","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://escholarship.org/content/qt4j22r25v/qt4j22r25v.pdf?t=qn8cpj","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028130545","display_name":"Parijat Mukherjee","orcid":"https://orcid.org/0000-0002-2532-7347"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Parijat Mukherjee","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0002-2532-7347","affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100432782","display_name":"Peng Li","orcid":"https://orcid.org/0000-0003-3548-4589"},"institutions":[{"id":"https://openalex.org/I2801613365","display_name":"Mitchell Institute","ror":"https://ror.org/03ds72003","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I2801613365"]},{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peng Li","raw_affiliation_strings":["Texas A&M University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University","institution_ids":["https://openalex.org/I2801613365","https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07566654,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"33","issue":"5","first_page":"28","last_page":"34"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.6293655633926392},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6250977516174316},{"id":"https://openalex.org/keywords/rank","display_name":"Rank (graph theory)","score":0.5831695199012756},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5825603604316711},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5284209847450256},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.49471423029899597},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4163265824317932},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3457355797290802},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22269004583358765},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17230400443077087},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12223535776138306}],"concepts":[{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.6293655633926392},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6250977516174316},{"id":"https://openalex.org/C164226766","wikidata":"https://www.wikidata.org/wiki/Q7293202","display_name":"Rank (graph theory)","level":2,"score":0.5831695199012756},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5825603604316711},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5284209847450256},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.49471423029899597},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4163265824317932},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3457355797290802},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22269004583358765},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17230400443077087},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12223535776138306},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mdat.2016.2593399","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2016.2593399","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},{"id":"pmh:oai:escholarship.org:ark:/13030/qt4j22r25v","is_oa":true,"landing_page_url":"https://escholarship.org/uc/item/4j22r25v","pdf_url":"https://escholarship.org/content/qt4j22r25v/qt4j22r25v.pdf?t=qn8cpj","source":{"id":"https://openalex.org/S4306400115","display_name":"eScholarship (California Digital Library)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2801248553","host_organization_name":"California Digital Library","host_organization_lineage":["https://openalex.org/I2801248553"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:escholarship.org:ark:/13030/qt4j22r25v","is_oa":true,"landing_page_url":"https://escholarship.org/uc/item/4j22r25v","pdf_url":"https://escholarship.org/content/qt4j22r25v/qt4j22r25v.pdf?t=qn8cpj","source":{"id":"https://openalex.org/S4306400115","display_name":"eScholarship (California Digital Library)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2801248553","host_organization_name":"California Digital Library","host_organization_lineage":["https://openalex.org/I2801248553"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3124853126","display_name":null,"funder_award_id":"1836.128","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G8906021937","display_name":null,"funder_award_id":"1117660","funder_id":"https://openalex.org/F4320337387","funder_display_name":"Division of Computing and Communication Foundations"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320337387","display_name":"Division of Computing and Communication Foundations","ror":"https://ror.org/01mng8331"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2497857214.pdf","grobid_xml":"https://content.openalex.org/works/W2497857214.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1504694836","https://openalex.org/W2006738984","https://openalex.org/W2024910069","https://openalex.org/W2051725773","https://openalex.org/W2112323457","https://openalex.org/W2118749577","https://openalex.org/W2120353978","https://openalex.org/W2125055259","https://openalex.org/W4243073678","https://openalex.org/W6677720047"],"related_works":["https://openalex.org/W2112835755","https://openalex.org/W4291951920","https://openalex.org/W2349674371","https://openalex.org/W2097495471","https://openalex.org/W1696545756","https://openalex.org/W2952827811","https://openalex.org/W2056202066","https://openalex.org/W2963262648","https://openalex.org/W4301867002","https://openalex.org/W2056790378"],"abstract_inverted_index":{"With":[0],"the":[1,39,45,59],"continuous":[2],"growing":[3],"of":[4,13,47],"analog":[5],"circuit":[6],"complexity,":[7],"identifying":[8],"critical":[9],"failure":[10],"modes":[11],"is":[12,34,55],"great":[14],"importance":[15],"today.":[16],"This":[17],"article":[18],"develops":[19],"an":[20],"information-theoretic":[21],"framework":[22,33],"to":[23,37,57],"rank":[24],"important":[25],"parameters":[26],"based":[27],"on":[28],"presilicon":[29],"data.":[30],"The":[31],"proposed":[32,60],"further":[35],"used":[36],"design":[38],"optimal":[40],"test":[41],"set":[42],"that":[43],"maximizes":[44],"probability":[46],"observing":[48],"out-of-specification":[49],"failures.":[50],"A":[51],"phase-locked":[52],"loop":[53],"example":[54],"adopted":[56],"validate":[58],"framework.":[61]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}