{"id":"https://openalex.org/W2054242451","doi":"https://doi.org/10.1109/mdat.2015.2413757","title":"Asynchronous Design\u2014Part 2: Systems and Methodologies","display_name":"Asynchronous Design\u2014Part 2: Systems and Methodologies","publication_year":2015,"publication_date":"2015-03-16","ids":{"openalex":"https://openalex.org/W2054242451","doi":"https://doi.org/10.1109/mdat.2015.2413757","mag":"2054242451"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2015.2413757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2015.2413757","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023548648","display_name":"Steven M. Nowick","orcid":"https://orcid.org/0000-0002-8837-8109"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven M. Nowick","raw_affiliation_strings":["Columbia University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Columbia University","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102796929","display_name":"Montek Singh","orcid":"https://orcid.org/0009-0005-3649-4465"},"institutions":[{"id":"https://openalex.org/I114027177","display_name":"University of North Carolina at Chapel Hill","ror":"https://ror.org/0130frc33","country_code":"US","type":"education","lineage":["https://openalex.org/I114027177"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Montek Singh","raw_affiliation_strings":["University of North Carolina at Chapel Hill","Dept. of Computer Science, Univ. of North Carolina, Chapel Hill, NC, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of North Carolina at Chapel Hill","institution_ids":["https://openalex.org/I114027177"]},{"raw_affiliation_string":"Dept. of Computer Science, Univ. of North Carolina, Chapel Hill, NC, USA","institution_ids":["https://openalex.org/I114027177"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.2257,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.91932191,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"32","issue":"3","first_page":"19","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.881142795085907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7733650207519531},{"id":"https://openalex.org/keywords/snapshot","display_name":"Snapshot (computer storage)","score":0.6620699167251587},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4631938338279724},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.4508877694606781},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4478953778743744},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.4343303143978119},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12302321195602417},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10486447811126709}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.881142795085907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7733650207519531},{"id":"https://openalex.org/C55282118","wikidata":"https://www.wikidata.org/wiki/Q252683","display_name":"Snapshot (computer storage)","level":2,"score":0.6620699167251587},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4631938338279724},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.4508877694606781},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4478953778743744},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.4343303143978119},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12302321195602417},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10486447811126709},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2015.2413757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2015.2413757","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3695693668","display_name":null,"funder_award_id":"CCF-0964606","funder_id":"https://openalex.org/F4320332169","funder_display_name":"Directorate for Computer and Information Science and Engineering"},{"id":"https://openalex.org/G4130658082","display_name":null,"funder_award_id":"CCF-1219013","funder_id":"https://openalex.org/F4320332169","funder_display_name":"Directorate for Computer and Information Science and Engineering"},{"id":"https://openalex.org/G858242564","display_name":null,"funder_award_id":"OCI-1127361","funder_id":"https://openalex.org/F4320332169","funder_display_name":"Directorate for Computer and Information Science and Engineering"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320320291","display_name":"University of Manchester","ror":"https://ror.org/027m9bs27"},{"id":"https://openalex.org/F4320332169","display_name":"Directorate for Computer and Information Science and Engineering","ror":"https://ror.org/025kzpk63"},{"id":"https://openalex.org/F4320332600","display_name":"University of North Carolina at Chapel Hill","ror":"https://ror.org/0130frc33"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1490983863","https://openalex.org/W1491037212","https://openalex.org/W1585465727","https://openalex.org/W1665361481","https://openalex.org/W1765538419","https://openalex.org/W1990239937","https://openalex.org/W1999538298","https://openalex.org/W2018257140","https://openalex.org/W2029806561","https://openalex.org/W2035560780","https://openalex.org/W2040723997","https://openalex.org/W2067044103","https://openalex.org/W2083580665","https://openalex.org/W2095593696","https://openalex.org/W2097453879","https://openalex.org/W2102326977","https://openalex.org/W2102327308","https://openalex.org/W2104949917","https://openalex.org/W2129792992","https://openalex.org/W2132385281","https://openalex.org/W2137541450","https://openalex.org/W2137978379","https://openalex.org/W2138205475","https://openalex.org/W2160566592","https://openalex.org/W2160823654","https://openalex.org/W2167577695","https://openalex.org/W2296755579","https://openalex.org/W3146292294","https://openalex.org/W3146410802","https://openalex.org/W4248814671","https://openalex.org/W6629338772","https://openalex.org/W6683394555"],"related_works":["https://openalex.org/W4312516786","https://openalex.org/W2085028021","https://openalex.org/W2093992207","https://openalex.org/W3094139610","https://openalex.org/W2146990170","https://openalex.org/W2129978639","https://openalex.org/W304800142","https://openalex.org/W2388325543","https://openalex.org/W1993985975","https://openalex.org/W2035720669"],"abstract_inverted_index":{"This":[0],"two-part":[1],"article":[2],"aims":[3],"to":[4],"provide":[5,83],"both":[6,65],"a":[7,19,84],"short":[8],"historical":[9],"and":[10,34,41,61,67,70,76,89],"technical":[11],"overview":[12],"of":[13,21,24,31,58,73,86],"asynchronous":[14,32,54,87],"design,":[15,33],"as":[16,18,91,93],"well":[17,92],"snapshot":[20],"the":[22,25,71],"state":[23],"art.":[26],"Part":[27,47],"1":[28],"covered":[29],"foundations":[30],"highlighted":[35],"recent":[36],"applications,":[37],"including":[38,56],"commercial":[39],"advances":[40],"use":[42],"in":[43],"emerging":[44],"application":[45],"areas.":[46],"2":[48],"focuses":[49],"on":[50],"methodologies":[51],"for":[52,64],"designing":[53],"systems,":[55],"basics":[57],"hazards,":[59],"synthesis":[60],"optimization":[62],"methods":[63],"logic-level":[66],"high-level":[68],"synthesis,":[69],"development":[72],"specification":[74],"languages":[75],"CAD":[77],"tool":[78],"flows.":[79],"Finally,":[80],"two":[81],"sidebars":[82],"summary":[85],"processors":[88],"architectures,":[90],"testing.":[94]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}