{"id":"https://openalex.org/W2029031605","doi":"https://doi.org/10.1109/mdat.2014.2361719","title":"Adaptive Learning Based Importance Sampling for Analog Circuit DPPM Estimation","display_name":"Adaptive Learning Based Importance Sampling for Analog Circuit DPPM Estimation","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W2029031605","doi":"https://doi.org/10.1109/mdat.2014.2361719","mag":"2029031605"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2014.2361719","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2014.2361719","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108524932","display_name":"Ender Y\u0131lmaz","orcid":"https://orcid.org/0009-0004-0254-5845"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Ender Yilmaz","raw_affiliation_strings":["Freescale Semiconductor, Inc., Austin, TX, USA","[Freescale Semiconductor, Inc., Austin, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Freescale Semiconductor, Inc., Austin, TX, USA","institution_ids":[]},{"raw_affiliation_string":"[Freescale Semiconductor, Inc., Austin, TX, USA]","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058946013","display_name":"Sule Ozev","orcid":"https://orcid.org/0000-0002-3636-715X"},"institutions":[{"id":"https://openalex.org/I4210162861","display_name":"E-Connection","ror":"https://ror.org/05gjytt71","country_code":"NL","type":"other","lineage":["https://openalex.org/I4210162861"]},{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["NL","US"],"is_corresponding":false,"raw_author_name":"Sule Ozev","raw_affiliation_strings":["Electrical Engineering Department, Arizona State University, Tempe, AZ, USA","IAFSE-ECEE: Connection One (C1)"],"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]},{"raw_affiliation_string":"IAFSE-ECEE: Connection One (C1)","institution_ids":["https://openalex.org/I4210162861"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5108524932"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5324,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.82384247,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6310638189315796},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.629596471786499},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.594612181186676},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5508798956871033},{"id":"https://openalex.org/keywords/estimation","display_name":"Estimation","score":0.549156129360199},{"id":"https://openalex.org/keywords/sample-and-hold","display_name":"Sample and hold","score":0.45793604850769043},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.45522981882095337},{"id":"https://openalex.org/keywords/analog-computer","display_name":"Analog computer","score":0.43885284662246704},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.42549216747283936},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3801219165325165},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.335620641708374},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3275546729564667},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3251291513442993},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3246561884880066},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.24445125460624695},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13755440711975098},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09000396728515625},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0776781439781189}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6310638189315796},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.629596471786499},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.594612181186676},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5508798956871033},{"id":"https://openalex.org/C96250715","wikidata":"https://www.wikidata.org/wiki/Q965330","display_name":"Estimation","level":2,"score":0.549156129360199},{"id":"https://openalex.org/C206565188","wikidata":"https://www.wikidata.org/wiki/Q836482","display_name":"Sample and hold","level":3,"score":0.45793604850769043},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.45522981882095337},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.43885284662246704},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.42549216747283936},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3801219165325165},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.335620641708374},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3275546729564667},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3251291513442993},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3246561884880066},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.24445125460624695},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13755440711975098},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09000396728515625},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0776781439781189},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2014.2361719","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2014.2361719","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1980147245","https://openalex.org/W1980864082","https://openalex.org/W2037900914","https://openalex.org/W2051357347","https://openalex.org/W2103793078","https://openalex.org/W2109824007","https://openalex.org/W2120353978","https://openalex.org/W2153437063","https://openalex.org/W2159254831","https://openalex.org/W3151457670","https://openalex.org/W4247977256","https://openalex.org/W4302383442"],"related_works":["https://openalex.org/W2007222089","https://openalex.org/W4242258007","https://openalex.org/W2155285526","https://openalex.org/W2394022884","https://openalex.org/W2185815555","https://openalex.org/W1917800633","https://openalex.org/W2357284929","https://openalex.org/W1862020018","https://openalex.org/W311401163","https://openalex.org/W2100027332"],"abstract_inverted_index":{"This":[0,47],"paper":[1,48],"addresses":[2],"the":[3,26],"important":[4],"problem":[5,55],"of":[6,32,64],"defect":[7,66],"level":[8,67],"estimation.":[9],"For":[10],"more":[11,45,61],"than":[12],"30":[13],"years,":[14],"there":[15],"have":[16],"been":[17],"published":[18],"models":[19],"which":[20],"are":[21],"commonly":[22],"used":[23],"to":[24,53,56],"estimate":[25],"time":[27],"zero":[28],"test":[29],"escape":[30,38],"rate":[31,39],"digital":[33],"logic":[34],"designs.":[35],"However,":[36],"estimating":[37],"for":[40],"analog":[41,65],"circuits":[42],"is":[43],"much":[44,60],"challenging.":[46],"applies":[49],"importance":[50],"sampling":[51],"techniques":[52],"this":[54],"arrive":[57],"at":[58],"a":[59],"practical":[62],"method":[63],"computation.":[68]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
