{"id":"https://openalex.org/W2061805924","doi":"https://doi.org/10.1109/mdat.2013.2266393","title":"Debug Automation for Logic Circuits Under Timing Variations","display_name":"Debug Automation for Logic Circuits Under Timing Variations","publication_year":2013,"publication_date":"2013-06-06","ids":{"openalex":"https://openalex.org/W2061805924","doi":"https://doi.org/10.1109/mdat.2013.2266393","mag":"2061805924"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2013.2266393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2013.2266393","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035874629","display_name":"Mehdi Dehbashi","orcid":null},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi Dehbashi","raw_affiliation_strings":["University of Bremen","Institute of Computer Science, University of Bremen, Bremen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bremen","institution_ids":["https://openalex.org/I180437899"]},{"raw_affiliation_string":"Institute of Computer Science, University of Bremen, Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5008766097","display_name":"G\u00f6rschwin Fey","orcid":"https://orcid.org/0000-0001-6433-6265"},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]},{"id":"https://openalex.org/I2898391981","display_name":"Deutsches Zentrum f\u00fcr Luft- und Raumfahrt e. V. (DLR)","ror":"https://ror.org/04bwf3e34","country_code":"DE","type":"facility","lineage":["https://openalex.org/I1305996414","https://openalex.org/I2898391981"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Gorschwin Fey","raw_affiliation_strings":["University of Bremen and German Aerospace Center","Institute of Computer Science, University of Bremen, Bremen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bremen and German Aerospace Center","institution_ids":["https://openalex.org/I180437899","https://openalex.org/I2898391981"]},{"raw_affiliation_string":"Institute of Computer Science, University of Bremen, Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.2085,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.92001703,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"30","issue":"6","first_page":"60","last_page":"69"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/boolean-satisfiability-problem","display_name":"Boolean satisfiability problem","score":0.7912043333053589},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.7670495510101318},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6446160078048706},{"id":"https://openalex.org/keywords/satisfiability-modulo-theories","display_name":"Satisfiability modulo theories","score":0.59760582447052},{"id":"https://openalex.org/keywords/satisfiability","display_name":"Satisfiability","score":0.5864256620407104},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.5052922368049622},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.46675872802734375},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.46017494797706604},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.4540586471557617},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4538499116897583},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.427839994430542},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.4215095043182373},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3756621778011322},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.35625678300857544},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22639575600624084},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12669292092323303},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08563065528869629}],"concepts":[{"id":"https://openalex.org/C6943359","wikidata":"https://www.wikidata.org/wiki/Q875276","display_name":"Boolean satisfiability problem","level":2,"score":0.7912043333053589},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.7670495510101318},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6446160078048706},{"id":"https://openalex.org/C164155591","wikidata":"https://www.wikidata.org/wiki/Q2067766","display_name":"Satisfiability modulo theories","level":2,"score":0.59760582447052},{"id":"https://openalex.org/C168773769","wikidata":"https://www.wikidata.org/wiki/Q1350299","display_name":"Satisfiability","level":2,"score":0.5864256620407104},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.5052922368049622},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.46675872802734375},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.46017494797706604},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.4540586471557617},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4538499116897583},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.427839994430542},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.4215095043182373},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3756621778011322},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.35625678300857544},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22639575600624084},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12669292092323303},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08563065528869629},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/mdat.2013.2266393","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2013.2266393","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test","raw_type":"journal-article"},{"id":"pmh:oai:elib.dlr.de:93696","is_oa":false,"landing_page_url":"https://elib.dlr.de/93696/","pdf_url":null,"source":{"id":"https://openalex.org/S4377196266","display_name":"elib (German Aerospace Center)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2898391981","host_organization_name":"Deutsches Zentrum f\u00fcr Luft- und Raumfahrt e. V. (DLR)","host_organization_lineage":["https://openalex.org/I2898391981"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Zeitschriftenbeitrag"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1967709031","https://openalex.org/W1979903718","https://openalex.org/W1991735330","https://openalex.org/W2014820630","https://openalex.org/W2021783304","https://openalex.org/W2036676277","https://openalex.org/W2080997801","https://openalex.org/W2106397260","https://openalex.org/W2109986557","https://openalex.org/W2114179668","https://openalex.org/W2167480374","https://openalex.org/W2171383332","https://openalex.org/W2171474236","https://openalex.org/W3146960355"],"related_works":["https://openalex.org/W3176904788","https://openalex.org/W2578463151","https://openalex.org/W21597398","https://openalex.org/W2091617677","https://openalex.org/W1945774704","https://openalex.org/W1505872263","https://openalex.org/W4298153058","https://openalex.org/W2408080066","https://openalex.org/W1913543287","https://openalex.org/W2268872489"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,32,39,47],"novel":[4],"approach":[5,23],"to":[6,51],"automate":[7],"speedpath":[8],"debugging":[9],"taking":[10],"into":[11,34,42],"account":[12],"variations.":[13],"The":[14,22],"proposed":[15],"technique":[16],"is":[17,24],"based":[18,25],"on":[19,26],"Boolean":[20,48],"Satisfiability.":[21],"converting":[27],"the":[28,35,43],"timing":[29],"behavior":[30],"of":[31],"circuit":[33],"functional":[36],"domain,":[37],"inserting":[38],"variation":[40],"logic":[41],"model,":[44],"and":[45],"using":[46],"Satisfiability":[49],"solver":[50],"extract":[52],"failing":[53],"speedpaths.":[54]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
