{"id":"https://openalex.org/W2037258889","doi":"https://doi.org/10.1109/mdat.2013.2250053","title":"Using GPUs to Accelerate CAD Algorithms","display_name":"Using GPUs to Accelerate CAD Algorithms","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2037258889","doi":"https://doi.org/10.1109/mdat.2013.2250053","mag":"2037258889"},"language":"en","primary_location":{"id":"doi:10.1109/mdat.2013.2250053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2013.2250053","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074825356","display_name":"John F. Croix","orcid":null},"institutions":[{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John F. Croix","raw_affiliation_strings":["Cadence Design Systems, USA","Cadence Design Systems, Austin"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cadence Design Systems, USA","institution_ids":["https://openalex.org/I66217453"]},{"raw_affiliation_string":"Cadence Design Systems, Austin","institution_ids":["https://openalex.org/I66217453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021685706","display_name":"Sunil P. Khatri","orcid":"https://orcid.org/0000-0001-7134-9929"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]},{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Sunil P. Khatri","raw_affiliation_strings":["Intel Corporation, India","[Dept of ECE, Texas A&M University, College Station]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"[Dept of ECE, Texas A&M University, College Station]","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012099201","display_name":"Kanupriya Gulati","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kanupriya Gulati","raw_affiliation_strings":["Texas A&M University, USA","Intel Corporation, Emeryville"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Texas A&M University, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Intel Corporation, Emeryville","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3114,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60161162,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"30","issue":"1","first_page":"8","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.7680565118789673},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6450799703598022},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.43465790152549744},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3731851577758789},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.3440355062484741},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.28928640484809875},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11417749524116516}],"concepts":[{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.7680565118789673},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6450799703598022},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.43465790152549744},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3731851577758789},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.3440355062484741},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.28928640484809875},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11417749524116516}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mdat.2013.2250053","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mdat.2013.2250053","pdf_url":null,"source":{"id":"https://openalex.org/S4210176427","display_name":"IEEE Design and Test","issn_l":"2168-2356","issn":["2168-2356","2168-2364"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design & Test","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1975338463","https://openalex.org/W2006771140","https://openalex.org/W2008424443","https://openalex.org/W2100636574","https://openalex.org/W2167078995","https://openalex.org/W3141440412","https://openalex.org/W3147150317"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W637098845","https://openalex.org/W2410116073","https://openalex.org/W2390279801","https://openalex.org/W3044972437","https://openalex.org/W2358668433","https://openalex.org/W2275866607"],"abstract_inverted_index":{"The":[0],"authors":[1],"give":[2],"an":[3,7],"introduction":[4],"to":[5],"developing":[6],"EDA":[8],"tool":[9],"on":[10],"a":[11],"graphical":[12],"processing":[13],"unit.":[14],"They":[15],"present":[16],"fault":[17],"simulation":[18],"as":[19],"one":[20],"of":[21],"their":[22],"EDA-specific":[23],"examples.":[24]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}