{"id":"https://openalex.org/W2144810145","doi":"https://doi.org/10.1109/mcom.2009.4907419","title":"Digital techniques for integrated frequency synthesizers: A tutorial","display_name":"Digital techniques for integrated frequency synthesizers: A tutorial","publication_year":2009,"publication_date":"2009-04-01","ids":{"openalex":"https://openalex.org/W2144810145","doi":"https://doi.org/10.1109/mcom.2009.4907419","mag":"2144810145"},"language":"en","primary_location":{"id":"doi:10.1109/mcom.2009.4907419","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mcom.2009.4907419","pdf_url":null,"source":{"id":"https://openalex.org/S158797327","display_name":"IEEE Communications Magazine","issn_l":"0163-6804","issn":["0163-6804","1558-1896"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Communications Magazine","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025807083","display_name":"Sudhakar Pamarti","orcid":"https://orcid.org/0000-0003-1457-7508"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"S. Pamarti","raw_affiliation_strings":["University of California, Los Angeles, USA","University of California, Los Angeles. CA"],"affiliations":[{"raw_affiliation_string":"University of California, Los Angeles, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"University of California, Los Angeles. CA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5025807083"],"corresponding_institution_ids":["https://openalex.org/I161318765"],"apc_list":null,"apc_paid":null,"fwci":0.8972,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.77968531,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"47","issue":"4","first_page":"126","last_page":"133"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8185302019119263},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6212270259857178},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.5287461280822754},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5214630961418152},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47559699416160583},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.46879348158836365},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.4440298080444336},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4417475461959839},{"id":"https://openalex.org/keywords/digital-down-converter","display_name":"Digital down converter","score":0.4394407570362091},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.42653340101242065},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.40402695536613464},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.38014259934425354},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37048494815826416},{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.30959928035736084},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.29868990182876587},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2907448410987854},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.27391037344932556},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.17630016803741455},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10092702507972717}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8185302019119263},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6212270259857178},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.5287461280822754},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5214630961418152},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47559699416160583},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.46879348158836365},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.4440298080444336},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4417475461959839},{"id":"https://openalex.org/C99167442","wikidata":"https://www.wikidata.org/wiki/Q559292","display_name":"Digital down converter","level":4,"score":0.4394407570362091},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.42653340101242065},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.40402695536613464},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.38014259934425354},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37048494815826416},{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.30959928035736084},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.29868990182876587},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2907448410987854},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.27391037344932556},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.17630016803741455},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10092702507972717},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mcom.2009.4907419","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mcom.2009.4907419","pdf_url":null,"source":{"id":"https://openalex.org/S158797327","display_name":"IEEE Communications Magazine","issn_l":"0163-6804","issn":["0163-6804","1558-1896"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Communications Magazine","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1492984241","https://openalex.org/W1964894970","https://openalex.org/W2030258400","https://openalex.org/W2062952706","https://openalex.org/W2067936044","https://openalex.org/W2072192908","https://openalex.org/W2084208879","https://openalex.org/W2103429594","https://openalex.org/W2120258930","https://openalex.org/W2127063672","https://openalex.org/W2143520193","https://openalex.org/W2146298723","https://openalex.org/W2149655780","https://openalex.org/W2150524153","https://openalex.org/W2152170957","https://openalex.org/W2163630970","https://openalex.org/W2166268103","https://openalex.org/W2167167820","https://openalex.org/W2177833654","https://openalex.org/W2296506225"],"related_works":["https://openalex.org/W2166555237","https://openalex.org/W2622028395","https://openalex.org/W2161572852","https://openalex.org/W4386197759","https://openalex.org/W2389258116","https://openalex.org/W2393010087","https://openalex.org/W2357163010","https://openalex.org/W2095308729","https://openalex.org/W2384090004","https://openalex.org/W2360804120"],"abstract_inverted_index":{"Frequency":[0],"synthesizers":[1],"are":[2,17],"essential":[3],"components":[4],"of":[5,51,61],"modern,":[6],"integrated":[7],"wireless":[8],"transceivers.":[9],"Traditional":[10],"analog":[11],"and":[12,38,58],"mixed-signal":[13],"circuit":[14],"design":[15],"techniques":[16,43,64],"proving":[18],"ineffective":[19],"in":[20,31],"achieving":[21],"the":[22,52],"challenging":[23],"performance":[24],"demands":[25],"placed":[26],"on":[27],"these":[28],"synthesizers,":[29,57],"particularly":[30],"very":[32],"fine":[33],"fabrication":[34],"technologies.":[35],"Digital-intensive":[36],"architectures":[37],"related":[39],"digital":[40,63],"signal":[41],"processing":[42],"offer":[44],"a":[45,59],"robust,":[46],"scalable":[47],"alternative.":[48],"A":[49],"tutorial":[50],"basic":[53],"problems":[54],"with":[55],"frequency":[56],"slew":[60],"recent":[62],"devoted":[65],"to":[66],"improving":[67],"their":[68],"performance,":[69],"is":[70],"presented.":[71]},"counts_by_year":[{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
