{"id":"https://openalex.org/W3151135238","doi":"https://doi.org/10.1109/mc.2020.3047006","title":"Reconfigurable Hardware in Postsilicon Microarchitecture","display_name":"Reconfigurable Hardware in Postsilicon Microarchitecture","publication_year":2021,"publication_date":"2021-03-01","ids":{"openalex":"https://openalex.org/W3151135238","doi":"https://doi.org/10.1109/mc.2020.3047006","mag":"3151135238"},"language":"en","primary_location":{"id":"doi:10.1109/mc.2020.3047006","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mc.2020.3047006","pdf_url":"https://ieeexplore.ieee.org/ielx7/2/9378889/09378919.pdf","source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://ieeexplore.ieee.org/ielx7/2/9378889/09378919.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072847774","display_name":"Daniel J. Sorin","orcid":"https://orcid.org/0000-0001-7013-8986"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Daniel J. Sorin","raw_affiliation_strings":["Duke University, North Carolina United States"],"affiliations":[{"raw_affiliation_string":"Duke University, North Carolina United States","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5072847774"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":0.2303,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.45298201,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"54","issue":"3","first_page":"4","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8773714303970337},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.7992033958435059},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6612188816070557},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5602808594703674},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4830354154109955},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.4553010165691376},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.4525463283061981},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.43535593152046204},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4153061509132385},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3976064920425415},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.12105721235275269}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8773714303970337},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.7992033958435059},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6612188816070557},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5602808594703674},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4830354154109955},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.4553010165691376},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4525463283061981},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.43535593152046204},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4153061509132385},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3976064920425415},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.12105721235275269}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mc.2020.3047006","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mc.2020.3047006","pdf_url":"https://ieeexplore.ieee.org/ielx7/2/9378889/09378919.pdf","source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/mc.2020.3047006","is_oa":true,"landing_page_url":"https://doi.org/10.1109/mc.2020.3047006","pdf_url":"https://ieeexplore.ieee.org/ielx7/2/9378889/09378919.pdf","source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.5099999904632568}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3151135238.pdf","grobid_xml":"https://content.openalex.org/works/W3151135238.grobid-xml"},"referenced_works_count":1,"referenced_works":["https://openalex.org/W3011646870"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W2038220260","https://openalex.org/W3164085601","https://openalex.org/W2126857316","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W2139962137","https://openalex.org/W2340647897"],"abstract_inverted_index":{"Computer":[0],"architects":[1],"want":[2],"to":[3,18,26,55],"design":[4,49],"processors":[5],"that":[6,61],"are":[7],"general":[8],"purpose":[9],"yet":[10],"have":[11],"the":[12,41,59,62],"performance":[13],"of":[14,29,43,53,58],"special-purpose":[15],"hardware":[16,30],"tailored":[17],"each":[19],"application.":[20],"Recently,":[21],"this":[22],"goal":[23],"has":[24],"led":[25],"a":[27],"proliferation":[28],"accelerators":[31],"for":[32],"important":[33],"tasks,":[34],"including":[35],"machine":[36],"learning":[37],"and":[38,50],"cryptography.":[39],"Despite":[40],"benefits":[42],"these":[44],"accelerators,":[45],"we":[46],"cannot":[47],"possibly":[48],"incorporate":[51],"enough":[52],"them":[54],"benefit":[56],"all":[57],"workloads":[60],"processor":[63],"will":[64],"run.":[65]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}