{"id":"https://openalex.org/W1881004402","doi":"https://doi.org/10.1109/mc.1986.1663207","title":"An Integrated Design System for the SX-1 and SX-2 Supercomputers","display_name":"An Integrated Design System for the SX-1 and SX-2 Supercomputers","publication_year":1986,"publication_date":"1986-04-01","ids":{"openalex":"https://openalex.org/W1881004402","doi":"https://doi.org/10.1109/mc.1986.1663207","mag":"1881004402"},"language":"en","primary_location":{"id":"doi:10.1109/mc.1986.1663207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mc.1986.1663207","pdf_url":null,"source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110755125","display_name":"Suzuki","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Suzuki","raw_affiliation_strings":["CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112196410","display_name":"T. Takahashi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Takahashi","raw_affiliation_strings":["CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104883870","display_name":"Sugimoto","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sugimoto","raw_affiliation_strings":["CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076634672","display_name":"Kuwata","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kuwata","raw_affiliation_strings":["CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CAD Engineering Department, Computer Engineering Division, NCE Corporation, Fuchu, Tokyo, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.18065343,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":"4","first_page":"72","last_page":"85"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9850999712944031,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.806371808052063},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34978997707366943},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3290804624557495},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3285742700099945}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.806371808052063},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34978997707366943},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3290804624557495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3285742700099945}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/mc.1986.1663207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/mc.1986.1663207","pdf_url":null,"source":{"id":"https://openalex.org/S178916657","display_name":"Computer","issn_l":"0018-9162","issn":["0018-9162","1558-0814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320439","host_organization_name":"IEEE Computer Society","host_organization_lineage":["https://openalex.org/P4310320439","https://openalex.org/P4310319808"],"host_organization_lineage_names":["IEEE Computer Society","Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.49000000953674316,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W186403871","https://openalex.org/W204880049","https://openalex.org/W1994530290","https://openalex.org/W2015972826","https://openalex.org/W2030236775","https://openalex.org/W2038600225","https://openalex.org/W2153684483","https://openalex.org/W2173124859","https://openalex.org/W2519395726","https://openalex.org/W4230750503","https://openalex.org/W4251216070","https://openalex.org/W4285719527","https://openalex.org/W6607586263","https://openalex.org/W6608340587","https://openalex.org/W6649235257","https://openalex.org/W6726781551"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2350741829","https://openalex.org/W2130043461","https://openalex.org/W2530322880","https://openalex.org/W1596801655"],"abstract_inverted_index":{"The":[0,74,162,221],"requirements":[1],"of":[2,30,43,106,111,125,169,189,217,251],"complex,":[3],"high-performance":[4],"computer":[5,44,68,245],"systems":[6,38,59,69,127],"have":[7,46],"changed":[8],"computer-design":[9],"methods":[10],"dramatically:":[11],"Today,":[12],"digital-system":[13,50],"design":[14,64,76,100,116,129,144,185],"is":[15],"based":[16],"on":[17],"state-of-the-art":[18],"semiconductor":[19],"technology,":[20],"highly":[21],"integrated":[22,75,179,254],"ICs,":[23],"and":[24,52,66,86,108,135,155,164,193,209,229],"custom":[25,72,170],"LSI":[26,171,222,240,262],"technology":[27,55,172,223,241],"-":[28],"all":[29],"which":[31],"make":[32,249],"CAD":[33,37,90,112,126,141,191,194,204,255],"tools":[34,113,195],"indispensable.":[35],"Many":[36],"meant":[39],"for":[40,118,149,175],"the":[41,53,84,103,109,120,140,153,176,187,190,198,203,210,218,244,258],"production":[42],"components":[45],"been":[47],"announced":[48],"by":[49],"manufacturers,":[51],"advanced":[54],"built":[56],"into":[57,180],"these":[58],"makes":[60],"it":[61,147,208],"possible":[62,148],"to":[63,82,114,139,151,263],"large":[65],"complex":[67],"that":[70,173,247],"incorporate":[71],"LSI.":[73],"system":[77,192,205,246,256,264],"devised":[78],"at":[79],"NEC":[80,150,235],"Corp.":[81],"create":[83],"SX-1":[85,154,163],"SX-2":[87,156,165],"supercomputers":[88],"includes":[89],"tools.":[91],"It":[92],"follows":[93],"three":[94],"strategies":[95,211],"(engineering":[96],"work-station":[97],"utilization,":[98],"thorough":[99],"verification":[101],"in":[102,157,202,227,232],"early":[104],"stages":[105],"design,":[107,134],"use":[110,250],"establish":[115],"flow)":[117],"realizing":[119],"four":[121],"main":[122],"features":[123,200],"required":[124,201,219],"(short":[128],"time,":[130],"high":[131],"productivity,":[132],"high-quality":[133,230],"a":[136,158],"user-friendly":[137],"interface":[138],"system).":[142],"This":[143,184],"method":[145],"made":[146],"develop":[152],"relatively":[159],"short":[160],"time.":[161],"are":[166],"entirely":[167],"composed":[168],"is,":[174],"most":[177],"part,":[178],"multichip":[181],"packages":[182],"(MCPs).":[183],"influenced":[186],"form":[188],"heavily":[196],"because":[197],"fourmore\u00a0\u00bb":[199],"resulted":[206],"from":[207,214,261],"were":[212],"proposed":[213],"an":[215,253],"analysis":[216],"features.":[220],"necessitated":[224],"both":[225],"improvements":[226],"productivy":[228],"design;":[231],"addition,":[233],"since":[234],"was":[236,265],"developing":[237],"not":[238],"only":[239],"but":[242],"also":[243],"would":[248],"it,":[252],"covering":[257],"physical":[259],"levels":[260],"necessary.\u00ab\u00a0less":[266]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}