{"id":"https://openalex.org/W4414310299","doi":"https://doi.org/10.1109/lssc.2025.3611018","title":"A Fully Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication","display_name":"A Fully Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication","publication_year":2025,"publication_date":"2025-01-01","ids":{"openalex":"https://openalex.org/W4414310299","doi":"https://doi.org/10.1109/lssc.2025.3611018"},"language":"en","primary_location":{"id":"doi:10.1109/lssc.2025.3611018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lssc.2025.3611018","pdf_url":null,"source":{"id":"https://openalex.org/S4210192596","display_name":"IEEE Solid-State Circuits Letters","issn_l":"2573-9603","issn":["2573-9603"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Solid-State Circuits Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5119061871","display_name":"Lucrezia Navarin","orcid":"https://orcid.org/0009-0009-5073-6423"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Lucrezia Navarin","raw_affiliation_strings":["Department of Information Engineering, University of Padua, Padua, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Padua, Padua, Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090009550","display_name":"Karl Norling","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Karl Norling","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technologies Austria, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5119061872","display_name":"Marco Parenzan","orcid":"https://orcid.org/0009-0005-5773-8852"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Marco Parenzan","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technologies Austria, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5119061874","display_name":"Stefano Ruzzu","orcid":"https://orcid.org/0009-0005-1722-5630"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Stefano Ruzzu","raw_affiliation_strings":["Infineon Technologies Austria AG, Villach, Austria","Infineon Technologies Austria, Villach, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technologies Austria, Villach, Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084402240","display_name":"A. Neviani","orcid":"https://orcid.org/0000-0002-7839-9192"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Neviani","raw_affiliation_strings":["Department of Information Engineering, University of Padua, Padua, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Padua, Padua, Italy","institution_ids":["https://openalex.org/I138689650"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035099638","display_name":"Andrea Bevilacqua","orcid":"https://orcid.org/0000-0002-5664-9197"},"institutions":[{"id":"https://openalex.org/I138689650","display_name":"University of Padua","ror":"https://ror.org/00240q980","country_code":"IT","type":"education","lineage":["https://openalex.org/I138689650"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Bevilacqua","raw_affiliation_strings":["Department of Information Engineering, University of Padua, Padua, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Padua, Padua, Italy","institution_ids":["https://openalex.org/I138689650"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5119061871"],"corresponding_institution_ids":["https://openalex.org/I138689650"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.2643679,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"8","issue":null,"first_page":"289","last_page":"292"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-shift-keying","display_name":"Frequency-shift keying","score":0.8888999819755554},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7189000248908997},{"id":"https://openalex.org/keywords/demodulation","display_name":"Demodulation","score":0.6442000269889832},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.6044999957084656},{"id":"https://openalex.org/keywords/amplitude-shift-keying","display_name":"Amplitude-shift keying","score":0.5964999794960022},{"id":"https://openalex.org/keywords/isolator","display_name":"Isolator","score":0.5515000224113464},{"id":"https://openalex.org/keywords/transmission","display_name":"Transmission (telecommunications)","score":0.4997999966144562},{"id":"https://openalex.org/keywords/data-transmission","display_name":"Data transmission","score":0.4869000017642975}],"concepts":[{"id":"https://openalex.org/C163996819","wikidata":"https://www.wikidata.org/wiki/Q1166054","display_name":"Frequency-shift keying","level":4,"score":0.8888999819755554},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7189000248908997},{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.6442000269889832},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.6044999957084656},{"id":"https://openalex.org/C2777973058","wikidata":"https://www.wikidata.org/wiki/Q477284","display_name":"Amplitude-shift keying","level":5,"score":0.5964999794960022},{"id":"https://openalex.org/C54888747","wikidata":"https://www.wikidata.org/wiki/Q962002","display_name":"Isolator","level":2,"score":0.5515000224113464},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.539900004863739},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5357000231742859},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.5123999714851379},{"id":"https://openalex.org/C761482","wikidata":"https://www.wikidata.org/wiki/Q118093","display_name":"Transmission (telecommunications)","level":2,"score":0.4997999966144562},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.4869000017642975},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.47279998660087585},{"id":"https://openalex.org/C2776542216","wikidata":"https://www.wikidata.org/wiki/Q6398306","display_name":"Keying","level":2,"score":0.46560001373291016},{"id":"https://openalex.org/C70234604","wikidata":"https://www.wikidata.org/wiki/Q780813","display_name":"Galvanic isolation","level":4,"score":0.43320000171661377},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3889999985694885},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.37689998745918274},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.37049999833106995},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.35589998960494995},{"id":"https://openalex.org/C2780949067","wikidata":"https://www.wikidata.org/wiki/Q1136752","display_name":"Transmission gate","level":4,"score":0.3434999883174896},{"id":"https://openalex.org/C101765175","wikidata":"https://www.wikidata.org/wiki/Q577764","display_name":"Communications system","level":2,"score":0.33739998936653137},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3122999966144562},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.2822999954223633},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.26460000872612}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/lssc.2025.3611018","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lssc.2025.3611018","pdf_url":null,"source":{"id":"https://openalex.org/S4210192596","display_name":"IEEE Solid-State Circuits Letters","issn_l":"2573-9603","issn":["2573-9603"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Solid-State Circuits Letters","raw_type":"journal-article"},{"id":"pmh:oai:www.research.unipd.it:11577/3562053","is_oa":false,"landing_page_url":"https://hdl.handle.net/11577/3562053","pdf_url":null,"source":{"id":"https://openalex.org/S4377196283","display_name":"Research Padua  Archive (University of Padua)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I138689650","host_organization_name":"University of Padua","host_organization_lineage":["https://openalex.org/I138689650"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2291514851","https://openalex.org/W2751348345","https://openalex.org/W2917314276","https://openalex.org/W2992159653","https://openalex.org/W3015866915","https://openalex.org/W3134360909","https://openalex.org/W3216736996","https://openalex.org/W4392745836","https://openalex.org/W4412624146"],"related_works":[],"abstract_inverted_index":{"A":[0,49],"fully-integrated":[1],"galvanic":[2],"isolator":[3],"for":[4,104,110],"gate":[5],"drivers":[6],"that":[7],"supports":[8],"high-speed,":[9],"asynchronous,":[10],"full-duplex":[11],"communication":[12,35,62],"is":[13,24,40],"presented.":[14],"Data":[15],"transmission":[16],"from":[17,83],"the":[18,21,37],"microcontroller":[19],"to":[20],"power":[22,92],"device":[23],"achieved":[25],"using":[26,42],"amplitude-shift":[27],"keying":[28,44],"(ASK)":[29],"at":[30,46,112],"100":[31],"Mb/s,":[32],"while":[33],"simultaneous":[34],"in":[36,58,67],"opposite":[38],"direction":[39],"implemented":[41],"frequency-shift":[43],"(FSK)":[45],"167":[47],"Mb/s.":[48],"delay-locked":[50],"loop":[51],"(DLL)-based":[52],"FSK":[53,111],"demodulator":[54],"enables":[55],"robust":[56],"operation":[57],"a":[59,68,84,90],"completely":[60],"asynchronous":[61],"scenario.":[63],"Prototypes":[64],"were":[65],"fabricated":[66],"0.13":[69],"\u03bcm":[70],"HV":[71],"CMOS":[72],"technology,":[73],"covering":[74],"an":[75],"area":[76],"of":[77,94],"2.2":[78],"mm.":[79],"The":[80],"system":[81],"operates":[82],"low":[85],"1.5":[86],"V":[87],"supply":[88],"with":[89],"total":[91],"consumption":[93],"8.2":[95],"mW.":[96],"Measured":[97],"propagation":[98],"delays":[99],"are":[100],"under":[101],"8":[102],"ns":[103,109],"ASK":[105],"and":[106],"below":[107],"4":[108],"their":[113],"respective":[114],"maximum":[115],"data":[116],"rates.":[117]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-10-10T00:00:00"}