{"id":"https://openalex.org/W4410858989","doi":"https://doi.org/10.1109/les.2025.3575017","title":"From MLIR to Scheduled CDFG: A Design Flow for Hardware Resource Estimation","display_name":"From MLIR to Scheduled CDFG: A Design Flow for Hardware Resource Estimation","publication_year":2025,"publication_date":"2025-05-29","ids":{"openalex":"https://openalex.org/W4410858989","doi":"https://doi.org/10.1109/les.2025.3575017"},"language":"en","primary_location":{"id":"doi:10.1109/les.2025.3575017","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2025.3575017","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038670319","display_name":"Jos\u00e9 Quevedo Quevedo","orcid":"https://orcid.org/0000-0003-0629-724X"},"institutions":[{"id":"https://openalex.org/I4210118730","display_name":"Instituto Tecnol\u00f3gico de Tijuana","ror":"https://ror.org/03dga7879","country_code":"MX","type":"education","lineage":["https://openalex.org/I4210118730"]},{"id":"https://openalex.org/I4210134596","display_name":"Universidad de Tijuana","ror":"https://ror.org/03qzc6q48","country_code":"MX","type":"education","lineage":["https://openalex.org/I4210134596"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Joel A. Quevedo","raw_affiliation_strings":["Posgrado en Ciencias de la Ingeniería, TecNM/ I.T. de Tijuana, Tijuana, Mexico"],"raw_orcid":"https://orcid.org/0000-0003-0629-724X","affiliations":[{"raw_affiliation_string":"Posgrado en Ciencias de la Ingeniería, TecNM/ I.T. de Tijuana, Tijuana, Mexico","institution_ids":["https://openalex.org/I4210118730","https://openalex.org/I4210134596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003906741","display_name":"Yazm\u00edn Maldonado","orcid":"https://orcid.org/0000-0002-3793-7484"},"institutions":[{"id":"https://openalex.org/I4210118730","display_name":"Instituto Tecnol\u00f3gico de Tijuana","ror":"https://ror.org/03dga7879","country_code":"MX","type":"education","lineage":["https://openalex.org/I4210118730"]},{"id":"https://openalex.org/I4210134596","display_name":"Universidad de Tijuana","ror":"https://ror.org/03qzc6q48","country_code":"MX","type":"education","lineage":["https://openalex.org/I4210134596"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Yazmin Maldonado","raw_affiliation_strings":["Posgrado en Ciencias de la Ingeniería, TecNM/ I.T. de Tijuana, Tijuana, Mexico"],"raw_orcid":"https://orcid.org/0000-0002-3793-7484","affiliations":[{"raw_affiliation_string":"Posgrado en Ciencias de la Ingeniería, TecNM/ I.T. de Tijuana, Tijuana, Mexico","institution_ids":["https://openalex.org/I4210118730","https://openalex.org/I4210134596"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":0.9278,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.73381894,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"17","issue":"6","first_page":"423","last_page":"426"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.982200026512146,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.982200026512146,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9688000082969666,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9398999810218811,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.819629430770874},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.567025363445282},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.5144550800323486},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4857221245765686},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4762023687362671},{"id":"https://openalex.org/keywords/estimation","display_name":"Estimation","score":0.4718453884124756},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4408552348613739},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.44075697660446167},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.336740106344223},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3353651165962219},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.16144812107086182},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.09887433052062988}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.819629430770874},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.567025363445282},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.5144550800323486},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4857221245765686},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4762023687362671},{"id":"https://openalex.org/C96250715","wikidata":"https://www.wikidata.org/wiki/Q965330","display_name":"Estimation","level":2,"score":0.4718453884124756},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4408552348613739},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.44075697660446167},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.336740106344223},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3353651165962219},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.16144812107086182},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.09887433052062988},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/les.2025.3575017","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2025.3575017","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.4099999964237213}],"awards":[{"id":"https://openalex.org/G5227180430","display_name":null,"funder_award_id":"22056.25-P","funder_id":"https://openalex.org/F4320313760","funder_display_name":"Tecnol\u00f3gico Nacional de M\u00e9xico"},{"id":"https://openalex.org/G6621238069","display_name":null,"funder_award_id":"1014860","funder_id":"https://openalex.org/F4320321739","funder_display_name":"Consejo Nacional de Ciencia y Tecnolog\u00eda"}],"funders":[{"id":"https://openalex.org/F4320313760","display_name":"Tecnol\u00f3gico Nacional de M\u00e9xico","ror":"https://ror.org/03dga7879"},{"id":"https://openalex.org/F4320321739","display_name":"Consejo Nacional de Ciencia y Tecnolog\u00eda","ror":"https://ror.org/059ex5q34"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1490783972","https://openalex.org/W1965671003","https://openalex.org/W2036706596","https://openalex.org/W2051360804","https://openalex.org/W2171318521","https://openalex.org/W3007652338","https://openalex.org/W3008230609","https://openalex.org/W3122286897","https://openalex.org/W3205717712","https://openalex.org/W3211485653","https://openalex.org/W4224924610","https://openalex.org/W4389104744","https://openalex.org/W4389722724","https://openalex.org/W4392745878"],"related_works":["https://openalex.org/W2091330445","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2138022277","https://openalex.org/W1631753024","https://openalex.org/W2004325343","https://openalex.org/W2533212402","https://openalex.org/W2592133661","https://openalex.org/W2121865749"],"abstract_inverted_index":{"Efficient":[0],"early":[1],"stages":[2],"exploration":[3,108],"in":[4],"hardware":[5,94],"design":[6,10,106],"can":[7],"significantly":[8],"enhance":[9],"quality":[11],"and":[12,32,44,62,70,83,89,97,116],"reduce":[13],"development":[14],"time.":[15],"This":[16,99],"paper":[17],"introduces":[18],"a":[19],"novel":[20],"methodology":[21],"that":[22],"leverages":[23],"the":[24,102],"Multi-Level":[25],"Intermediate":[26],"Representation":[27],"(MLIR)":[28],"to":[29,113,121],"extract":[30],"Control":[31],"Data":[33],"Flow":[34],"Graphs":[35],"(CDFGs)":[36],"with":[37,54],"earlystage":[38],"resource":[39,95],"estimates":[40],"for":[41,50,56,104],"area,":[42],"delay,":[43],"power":[45],"consumption.":[46],"By":[47],"employing":[48],"Polygeist":[49],"C-to-MLIR":[51],"conversion":[52],"coupled":[53],"Graphviz":[55],"visualization,":[57],"we":[58],"generate":[59],"structured":[60],"CDFGs":[61],"then":[63],"apply":[64],"three":[65],"scheduling":[66,90],"algorithms:":[67],"ASAP,":[68],"ALAP,":[69],"Random.":[71],"Evaluated":[72],"through":[73],"two":[74],"case":[75],"studies,":[76],"our":[77],"approach":[78],"produces":[79],"valid":[80],"scheduled":[81],"graphs":[82],"demonstrates":[84],"how":[85],"both":[86],"code":[87],"structure":[88],"strategy":[91],"critically":[92],"impact":[93],"utilization":[96],"performance.":[98],"work":[100],"sets":[101],"stage":[103],"resource-aware":[105],"space":[107],"using":[109],"MLIR,":[110],"enabling":[111],"designers":[112],"evaluate":[114],"configurations":[115],"make":[117],"informed":[118],"tradeoffs":[119],"prior":[120],"time-consuming":[122],"synthesis":[123],"processes.":[124]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}