{"id":"https://openalex.org/W4394938894","doi":"https://doi.org/10.1109/les.2024.3391220","title":"Improving Netlist Transformation-Based Approximate Logic Synthesis Through Resynthesis","display_name":"Improving Netlist Transformation-Based Approximate Logic Synthesis Through Resynthesis","publication_year":2024,"publication_date":"2024-04-18","ids":{"openalex":"https://openalex.org/W4394938894","doi":"https://doi.org/10.1109/les.2024.3391220"},"language":"en","primary_location":{"id":"doi:10.1109/les.2024.3391220","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/les.2024.3391220","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5095775387","display_name":"Roger Morales-Monge","orcid":"https://orcid.org/0009-0009-2438-1745"},"institutions":[{"id":"https://openalex.org/I145372079","display_name":"Instituto Tecnol\u00f3gico de Costa Rica","ror":"https://ror.org/04zhrfn38","country_code":"CR","type":"education","lineage":["https://openalex.org/I145372079"]}],"countries":["CR"],"is_corresponding":false,"raw_author_name":"Roger Morales-Monge","raw_affiliation_strings":["School of Electronics Engineering, Instituto Tecnológico de Costa Rica, Cartago, Costa Rica"],"raw_orcid":"https://orcid.org/0009-0009-2438-1745","affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Instituto Tecnológico de Costa Rica, Cartago, Costa Rica","institution_ids":["https://openalex.org/I145372079"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051404579","display_name":"J. Castro Godinez","orcid":"https://orcid.org/0000-0003-4808-4904"},"institutions":[{"id":"https://openalex.org/I4210125590","display_name":"Institute for Systems Engineering and Computers","ror":"https://ror.org/033wn8m60","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Jorge Castro-God\u00ednez","raw_affiliation_strings":["High-Performance Computing Architectures and Systems Research Group, Instituto de Engenharia de Sistemas e Computadores—Investigação e Desenvolvimento, Lisbon, Portugal"],"raw_orcid":"https://orcid.org/0000-0003-4808-4904","affiliations":[{"raw_affiliation_string":"High-Performance Computing Architectures and Systems Research Group, Instituto de Engenharia de Sistemas e Computadores—Investigação e Desenvolvimento, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210125590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064318827","display_name":"Guilherme Paim","orcid":"https://orcid.org/0000-0001-7809-9563"},"institutions":[{"id":"https://openalex.org/I4210125590","display_name":"Institute for Systems Engineering and Computers","ror":"https://ror.org/033wn8m60","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Guilherme Paim","raw_affiliation_strings":["High-Performance Computing Architectures and Systems Research Group, Instituto de Engenharia de Sistemas e Computadores—Investigação e Desenvolvimento, Lisbon, Portugal"],"raw_orcid":"https://orcid.org/0000-0001-7809-9563","affiliations":[{"raw_affiliation_string":"High-Performance Computing Architectures and Systems Research Group, Instituto de Engenharia de Sistemas e Computadores—Investigação e Desenvolvimento, Lisbon, Portugal","institution_ids":["https://openalex.org/I4210125590"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1244,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.35770663,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"16","issue":"3","first_page":"279","last_page":"282"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.8905574679374695},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8283946514129639},{"id":"https://openalex.org/keywords/pruning","display_name":"Pruning","score":0.6828544735908508},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.6148701906204224},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5335543751716614},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5227908492088318},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.46951717138290405},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.4520284831523895},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42760002613067627},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.42248067259788513},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.41387292742729187},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3938027024269104},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2007300853729248},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.18450862169265747}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.8905574679374695},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8283946514129639},{"id":"https://openalex.org/C108010975","wikidata":"https://www.wikidata.org/wiki/Q500094","display_name":"Pruning","level":2,"score":0.6828544735908508},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.6148701906204224},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5335543751716614},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5227908492088318},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.46951717138290405},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.4520284831523895},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42760002613067627},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.42248067259788513},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.41387292742729187},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3938027024269104},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2007300853729248},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.18450862169265747},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/les.2024.3391220","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/les.2024.3391220","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320323280","display_name":"Instituto Tecnol\u00f3gico de Costa Rica","ror":"https://ror.org/04zhrfn38"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2109489315","https://openalex.org/W2496519511","https://openalex.org/W2587701905","https://openalex.org/W2798497431","https://openalex.org/W3071517735","https://openalex.org/W3146543203","https://openalex.org/W4235991875","https://openalex.org/W4282563753","https://openalex.org/W4366985336"],"related_works":["https://openalex.org/W1557016741","https://openalex.org/W2543290882","https://openalex.org/W1964556228","https://openalex.org/W2269990635","https://openalex.org/W2029518208","https://openalex.org/W4285464654","https://openalex.org/W3013057549","https://openalex.org/W2906427691","https://openalex.org/W2507786429","https://openalex.org/W2068777369"],"abstract_inverted_index":{"To":[0],"address":[1],"the":[2,31,47,71,80,84,88,94,99],"challenges":[3],"of":[4,13,33,37,40,49,54,90],"efficient":[5],"hardware":[6],"design":[7,28,65,100],"for":[8,79],"error-tolerant":[9],"applications,":[10],"several":[11],"techniques":[12],"applied":[14],"approximate":[15,24,64],"computing":[16],"have":[17],"been":[18],"proposed.":[19],"Pruning":[20],"algorithms":[21],"aim":[22],"to":[23,75,97,106],"circuits":[25],"with":[26,58],"reduced":[27],"requirements":[29],"at":[30],"cost":[32],"an":[34,51,108],"acceptable":[35],"degradation":[36],"their":[38],"quality":[39],"result.":[41],"In":[42],"this":[43],"letter,":[44],"we":[45],"present":[46],"effects":[48],"resynthesis,":[50],"iterative":[52],"application":[53],"logic":[55],"synthesis":[56],"along":[57],"pruning":[59],"algorithms,":[60],"into":[61],"a":[62],"state-of-the-art":[63],"flow,":[66],"AxLS.":[67],"Resynthesis":[68],"strategy":[69],"improves":[70],"approximation,":[72],"achieving":[73],"up":[74,103],"70%":[76],"area-power":[77],"savings":[78],"same":[81],"error":[82],"in":[83,102],"output,":[85],"and":[86,92],"reducing":[87],"number":[89],"iterations,":[91],"hence":[93],"time":[95],"required":[96],"explore":[98],"space":[101],"to$30\\times":[104],"$,":[105],"obtain":[107],"approximated":[109],"design.":[110]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}