{"id":"https://openalex.org/W3061070527","doi":"https://doi.org/10.1109/les.2020.3017455","title":"Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators","display_name":"Design Space Exploration of FPGA-Based System With Multiple DNN Accelerators","publication_year":2020,"publication_date":"2020-08-18","ids":{"openalex":"https://openalex.org/W3061070527","doi":"https://doi.org/10.1109/les.2020.3017455","mag":"3061070527"},"language":"en","primary_location":{"id":"doi:10.1109/les.2020.3017455","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2020.3017455","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013807519","display_name":"Rajesh Kedia","orcid":"https://orcid.org/0000-0003-3711-0396"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajesh Kedia","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0000-0003-3711-0396","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083734260","display_name":"Shikha Goel","orcid":"https://orcid.org/0009-0000-8744-1789"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shikha Goel","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102857440","display_name":"S. Balakrishnan","orcid":"https://orcid.org/0009-0000-2568-0151"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. Balakrishnan","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085835894","display_name":"Kolin Paul","orcid":"https://orcid.org/0000-0001-6970-5509"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kolin Paul","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074675503","display_name":"Rijurekha Sen","orcid":"https://orcid.org/0000-0002-2465-3650"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rijurekha Sen","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":1.2113,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.79109638,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"13","issue":"3","first_page":"114","last_page":"117"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8420840501785278},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.831476092338562},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.6514499187469482},{"id":"https://openalex.org/keywords/pruning","display_name":"Pruning","score":0.6304974555969238},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5812575817108154},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.5654904246330261},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5524345636367798},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.518149733543396},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.4949726462364197},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4590451121330261},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.42559146881103516},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4160696268081665},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.41224637627601624},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.40578651428222656},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40241575241088867},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.364888072013855},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.27685871720314026},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24195489287376404},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13843604922294617}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8420840501785278},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.831476092338562},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.6514499187469482},{"id":"https://openalex.org/C108010975","wikidata":"https://www.wikidata.org/wiki/Q500094","display_name":"Pruning","level":2,"score":0.6304974555969238},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5812575817108154},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.5654904246330261},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5524345636367798},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.518149733543396},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4949726462364197},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4590451121330261},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.42559146881103516},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4160696268081665},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.41224637627601624},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.40578651428222656},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40241575241088867},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.364888072013855},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.27685871720314026},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24195489287376404},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13843604922294617},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/les.2020.3017455","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2020.3017455","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[{"id":"https://openalex.org/G7773590807","display_name":null,"funder_award_id":"\u201cSMDP-C2SD\u201d","funder_id":"https://openalex.org/F4320325255","funder_display_name":"Ministry of Electronics and Information technology"}],"funders":[{"id":"https://openalex.org/F4320325255","display_name":"Ministry of Electronics and Information technology","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2039920015","https://openalex.org/W2044235194","https://openalex.org/W2081166696","https://openalex.org/W2115045394","https://openalex.org/W2250001272","https://openalex.org/W2616014673","https://openalex.org/W2911884654","https://openalex.org/W2919915323","https://openalex.org/W2946241471","https://openalex.org/W2946425846","https://openalex.org/W2962862017","https://openalex.org/W2965973489","https://openalex.org/W2997106510","https://openalex.org/W4247461773","https://openalex.org/W6660295455"],"related_works":["https://openalex.org/W2532502681","https://openalex.org/W3133116121","https://openalex.org/W1995613452","https://openalex.org/W2625058759","https://openalex.org/W3195471267","https://openalex.org/W2971009090","https://openalex.org/W3032310658","https://openalex.org/W3193212547","https://openalex.org/W3157864596","https://openalex.org/W2295680811"],"abstract_inverted_index":{"Many":[0],"emerging":[1],"systems":[2],"concurrently":[3],"execute":[4],"multiple":[5],"applications":[6],"that":[7],"use":[8],"deep":[9],"neural":[10],"network":[11],"(DNN)":[12],"as":[13],"a":[14,66,80,113],"key":[15],"portion":[16],"of":[17,24,68,115,120],"the":[18,22,57,118,129],"computation.":[19],"To":[20],"speedup":[21],"execution":[23],"such":[25,45],"DNNs,":[26],"various":[27],"hardware":[28],"accelerators":[29],"have":[30],"been":[31],"proposed":[32,110],"in":[33,89,100,117,128],"recent":[34],"works.":[35],"Deep":[36],"learning":[37],"processor":[38],"unit":[39],"(DPU)":[40],"from":[41],"Xilinx":[42],"is":[43],"one":[44],"accelerator":[46],"targeted":[47],"for":[48,62],"field":[49],"programmable":[50],"gate":[51],"array":[52],"(FPGA)-based":[53],"systems.":[54],"We":[55],"study":[56],"runtime":[58],"and":[59,71,93,106,126],"energy":[60,94],"consumption":[61,95],"different":[63],"DNNs":[64],"on":[65],"range":[67],"DPU":[69,104],"configurations":[70],"derive":[72],"useful":[73],"insights.":[74],"Using":[75],"these":[76],"insights,":[77],"we":[78],"formulate":[79],"design":[81,121],"space":[82],"exploration":[83],"(DSE)":[84],"strategy":[85,111],"to":[86,98,123],"explore":[87],"tradeoffs":[88],"accuracy,":[90],"runtime,":[91],"cost,":[92],"arising":[96],"due":[97],"flexibility":[99],"choosing":[101],"DNN":[102],"topology,":[103],"configuration,":[105],"FPGA":[107],"model.":[108],"The":[109],"provides":[112],"reduction":[114],"28\u00d7":[116],"number":[119],"points":[122],"be":[124],"simulated":[125],"23\u00d7":[127],"pruning":[130],"time.":[131]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}