{"id":"https://openalex.org/W2344787150","doi":"https://doi.org/10.1109/les.2016.2527925","title":"ANT3D: Simultaneous Partitioning and Placement for 3-D FPGAs based on Ant Colony Optimization","display_name":"ANT3D: Simultaneous Partitioning and Placement for 3-D FPGAs based on Ant Colony Optimization","publication_year":2016,"publication_date":"2016-02-10","ids":{"openalex":"https://openalex.org/W2344787150","doi":"https://doi.org/10.1109/les.2016.2527925","mag":"2344787150"},"language":"en","primary_location":{"id":"doi:10.1109/les.2016.2527925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2016.2527925","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055974043","display_name":"Panayiotis Danassis","orcid":"https://orcid.org/0000-0002-6516-2495"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Panayiotis Danassis","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072486756","display_name":"Kostas Siozios","orcid":"https://orcid.org/0000-0002-0285-2202"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kostas Siozios","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["School of ECE, National Technical University of Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":0.1782,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.54376801,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"8","issue":"2","first_page":"41","last_page":"44"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.9402281045913696},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8257331848144531},{"id":"https://openalex.org/keywords/ant-colony-optimization-algorithms","display_name":"Ant colony optimization algorithms","score":0.7912846803665161},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.619354784488678},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5179888010025024},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4153746962547302},{"id":"https://openalex.org/keywords/ant-colony","display_name":"Ant colony","score":0.41518527269363403},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.311964750289917}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.9402281045913696},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8257331848144531},{"id":"https://openalex.org/C40128228","wikidata":"https://www.wikidata.org/wiki/Q460851","display_name":"Ant colony optimization algorithms","level":2,"score":0.7912846803665161},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.619354784488678},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5179888010025024},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4153746962547302},{"id":"https://openalex.org/C60891933","wikidata":"https://www.wikidata.org/wiki/Q796575","display_name":"Ant colony","level":3,"score":0.41518527269363403},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.311964750289917}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/les.2016.2527925","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2016.2527925","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5799999833106995,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1573676079","https://openalex.org/W1944814515","https://openalex.org/W2050456603","https://openalex.org/W2100973890","https://openalex.org/W2111104699","https://openalex.org/W2129785295","https://openalex.org/W2132668926","https://openalex.org/W2150871235","https://openalex.org/W2155707315","https://openalex.org/W2160433109","https://openalex.org/W2170034300","https://openalex.org/W2275304190","https://openalex.org/W2481508967","https://openalex.org/W3140592728","https://openalex.org/W4299796063","https://openalex.org/W6683701661"],"related_works":["https://openalex.org/W2145339442","https://openalex.org/W3217774925","https://openalex.org/W2347951034","https://openalex.org/W2313077844","https://openalex.org/W2388326823","https://openalex.org/W2366876790","https://openalex.org/W2071981049","https://openalex.org/W2381829748","https://openalex.org/W2244460820","https://openalex.org/W2109336245"],"abstract_inverted_index":{"Three-dimensional":[0],"technologies":[1],"offer":[2],"great":[3],"promise":[4],"in":[5,8,72],"providing":[6],"improvements":[7],"the":[9,38,68,81],"overall":[10],"circuit":[11],"performance.":[12],"This":[13],"letter":[14],"introduces":[15],"a":[16],"novel":[17],"netlist":[18],"partitioning":[19],"and":[20],"placement":[21],"algorithm,":[22],"named":[23],"ANT3D,":[24],"targeting":[25],"3-D":[26],"reconfigurable":[27],"architectures,":[28],"based":[29],"on":[30,50],"ant":[31],"colony":[32],"optimization":[33],"(ACO).":[34],"Experimental":[35],"results":[36],"show":[37],"effectiveness":[39],"of":[40,84],"ANT3D":[41],"algorithm":[42],"as":[43],"we":[44],"achieve":[45],"performance":[46],"enhancement":[47],"by":[48,64],"10%":[49],"average,":[51],"compared":[52],"to":[53,78],"state-of-the-art":[54],"tools,":[55],"while":[56],"using":[57],"significantly":[58],"fewer":[59],"through-silicon":[60],"vias":[61],"(TSVs).":[62],"Finally,":[63],"taking":[65],"benefit":[66],"from":[67],"inherent":[69],"parallelism":[70],"found":[71],"ACO":[73],"algorithms,":[74],"it":[75],"is":[76],"feasible":[77],"notable":[79],"reduce":[80],"execution":[82],"run-time":[83],"our":[85],"algorithm.":[86]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}