{"id":"https://openalex.org/W2146307826","doi":"https://doi.org/10.1109/les.2011.2146228","title":"Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations","display_name":"Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations","publication_year":2011,"publication_date":"2011-04-26","ids":{"openalex":"https://openalex.org/W2146307826","doi":"https://doi.org/10.1109/les.2011.2146228","mag":"2146307826"},"language":"en","primary_location":{"id":"doi:10.1109/les.2011.2146228","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2011.2146228","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://doi.org/10.1109/LES.2011.2146228","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052217926","display_name":"Iraklis Anagnostopoulos","orcid":"https://orcid.org/0000-0003-0985-3045"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Iraklis Anagnostopoulos","raw_affiliation_strings":["School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076432415","display_name":"Sotirios Xydis","orcid":"https://orcid.org/0000-0003-3151-2730"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Sotirios Xydis","raw_affiliation_strings":["School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111503427","display_name":"Alexandros Bartzas","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Alexandros Bartzas","raw_affiliation_strings":["School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072973899","display_name":"Zhonghai Lu","orcid":"https://orcid.org/0000-0003-0061-3475"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Zhonghai Lu","raw_affiliation_strings":["Department of Electronic Communication and Software Systems, Royal Institute of Technology, Stockholm, Sweden","Dept. of Electron., Commun. & Software Syst., R. Inst. of Technol. (KTH), Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Communication and Software Systems, Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Dept. of Electron., Commun. & Software Syst., R. Inst. of Technol. (KTH), Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National and Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032163732","display_name":"Axel Jantsch","orcid":"https://orcid.org/0000-0003-2251-0004"},"institutions":[{"id":"https://openalex.org/I86987016","display_name":"KTH Royal Institute of Technology","ror":"https://ror.org/026vcq606","country_code":"SE","type":"education","lineage":["https://openalex.org/I86987016"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Axel Jantsch","raw_affiliation_strings":["Department of Electronic Communication and Software Systems, Royal Institute of Technology, Stockholm, Sweden","Dept. of Electron., Commun. & Software Syst., R. Inst. of Technol. (KTH), Stockholm, Sweden"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Communication and Software Systems, Royal Institute of Technology, Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]},{"raw_affiliation_string":"Dept. of Electron., Commun. & Software Syst., R. Inst. of Technol. (KTH), Stockholm, Sweden","institution_ids":["https://openalex.org/I86987016"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5052217926"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":1.8038,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.86492956,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"3","issue":"2","first_page":"66","last_page":"69"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8584285974502563},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.8236082792282104},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7014273405075073},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.6214408278465271},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5980318188667297},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5915344953536987},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5663574934005737},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.5472228527069092},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.5082923769950867},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.484507292509079},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.47975289821624756},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4708247482776642},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.46959057450294495},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.44227489829063416},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.4284510612487793},{"id":"https://openalex.org/keywords/personalization","display_name":"Personalization","score":0.4194180369377136},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.41282418370246887},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40517544746398926},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.3690934181213379},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2381649613380432},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.22325268387794495},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21873638033866882},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1616864800453186},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1273317039012909}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8584285974502563},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.8236082792282104},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7014273405075073},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.6214408278465271},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5980318188667297},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5915344953536987},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5663574934005737},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.5472228527069092},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.5082923769950867},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.484507292509079},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.47975289821624756},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4708247482776642},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.46959057450294495},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.44227489829063416},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.4284510612487793},{"id":"https://openalex.org/C183003079","wikidata":"https://www.wikidata.org/wiki/Q1000371","display_name":"Personalization","level":2,"score":0.4194180369377136},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.41282418370246887},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40517544746398926},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.3690934181213379},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2381649613380432},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.22325268387794495},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21873638033866882},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1616864800453186},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1273317039012909},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/les.2011.2146228","is_oa":false,"landing_page_url":"https://doi.org/10.1109/les.2011.2146228","pdf_url":null,"source":{"id":"https://openalex.org/S22443479","display_name":"IEEE Embedded Systems Letters","issn_l":"1943-0663","issn":["1943-0663","1943-0671"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.204.7246","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.204.7246","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://web.it.kth.se/%7Eaxel/papers/2011/ESL-IraklisAnagnostopoulos.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.645.2836","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.645.2836","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://web.it.kth.se/~zhonghai/papers/2011/ESL11_Iraklis/","raw_type":"text"},{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/21067","is_oa":true,"landing_page_url":"http://doi.org/10.1109/LES.2011.2146228","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/21067","is_oa":true,"landing_page_url":"http://doi.org/10.1109/LES.2011.2146228","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Embedded Systems Letters","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1559283829","https://openalex.org/W1899349177","https://openalex.org/W1997145140","https://openalex.org/W2025701688","https://openalex.org/W2035720033","https://openalex.org/W2060058231","https://openalex.org/W2103879010","https://openalex.org/W2112457107","https://openalex.org/W2118420116","https://openalex.org/W2128274900","https://openalex.org/W2133408285","https://openalex.org/W2160847478","https://openalex.org/W4249713879","https://openalex.org/W4253408813","https://openalex.org/W4256282209","https://openalex.org/W6639498907","https://openalex.org/W6675552193"],"related_works":["https://openalex.org/W2354036839","https://openalex.org/W4321458411","https://openalex.org/W2587873888","https://openalex.org/W1575240748","https://openalex.org/W1979384060","https://openalex.org/W2041174925","https://openalex.org/W1968088890","https://openalex.org/W4293054943","https://openalex.org/W2044064773","https://openalex.org/W3048967625"],"abstract_inverted_index":{"Multiprocessor":[0],"system-on-chip":[1],"(MPSoCs)":[2],"have":[3,64],"attracted":[4],"significant":[5],"attention":[6],"since":[7],"they":[8],"are":[9,73],"recognized":[10],"as":[11],"a":[12,19,49],"scalable":[13],"paradigm":[14],"to":[15,35,135],"interconnect":[16],"and":[17,80,119,140],"organize":[18],"high":[20],"number":[21],"of":[22,31,55,88,92,102],"cores.":[23],"Current":[24],"multicore":[25],"embedded":[26],"systems":[27],"exhibit":[28],"increased":[29],"levels":[30],"dynamic":[32,56,61],"behavior,":[33],"leading":[34],"unexpected":[36],"memory":[37,45,62,90,112,138],"footprint":[38],"variations":[39],"unknown":[40],"at":[41,117],"design":[42],"time.":[43],"Dynamic":[44],"management":[46],"(DMM)":[47],"is":[48,115],"promising":[50],"solution":[51],"for":[52,67],"such":[53],"types":[54],"systems.":[57],"Although":[58],"some":[59],"efficient":[60],"managers":[63],"been":[65],"proposed":[66],"conventional":[68],"bus-based":[69],"MPSoC":[70,108],"platforms,":[71],"there":[72],"no":[74],"DMM":[75,106,126],"solutions":[76],"regarding":[77],"the":[78,81,85,93,100,145],"constraints":[79],"opportunities":[82],"delivered":[83],"by":[84],"physical":[86],"distribution":[87],"multiple":[89],"nodes":[91],"platform.":[94],"In":[95],"this":[96],"work,":[97],"we":[98],"address":[99],"problem":[101],"providing":[103],"customized":[104,124],"microcoded":[105,125],"on":[107],"platforms":[109,139],"with":[110],"distributed":[111,137],"organization.":[113],"Customization":[114],"enabled":[116],"application-":[118],"platform-level.":[120],"Results":[121],"show":[122],"that":[123],"can":[127],"serve":[128],"approximately":[129],"7\u00d7":[130],"more":[131],"allocation":[132],"requests":[133],"compared":[134],"pure":[136],"perform":[141],"25%":[142],"faster":[143],"than":[144],"corresponding":[146],"high-level":[147],"implementation":[148],"in":[149],"C":[150],"language.":[151]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
