{"id":"https://openalex.org/W7131844691","doi":"https://doi.org/10.1109/lca.2026.3668463","title":"CMM-H PMEM: Performance Characterization of CXL Large Capacity Persistent Memory","display_name":"CMM-H PMEM: Performance Characterization of CXL Large Capacity Persistent Memory","publication_year":2026,"publication_date":"2026-01-01","ids":{"openalex":"https://openalex.org/W7131844691","doi":"https://doi.org/10.1109/lca.2026.3668463"},"language":null,"primary_location":{"id":"doi:10.1109/lca.2026.3668463","is_oa":true,"landing_page_url":"https://doi.org/10.1109/lca.2026.3668463","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1109/lca.2026.3668463","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5127265387","display_name":"Gongjin Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Gongjin Sun","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0002-5420-1361","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127402872","display_name":"Mehdi Nik","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Mehdi Nik","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0007-7097-2488","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5118596424","display_name":"Senthil Murugesapandian","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Senthil Murugesapandian","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0009-0403-8704","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127440604","display_name":"Dongyang Li","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongyang Li","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0003-3415-709X","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127461876","display_name":"Kwan Huen","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kwan Huen","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089599626","display_name":"Xuebin Yao","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Xuebin Yao","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0008-2731-4807","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004481931","display_name":"Caroline Kahn","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Caroline Kahn","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0003-0601-0410","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046127616","display_name":"Amir Beygi","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Amir Beygi","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0005-9621-4656","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5127010056","display_name":"Vitorio Cargnini","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Vitorio Cargnini","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0000-0003-0580-5716","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5118596423","display_name":"Ramdas Kachare","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Ramdas Kachare","raw_affiliation_strings":["Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0009-0007-0909-8488","affiliations":[{"raw_affiliation_string":"Memory Solutions Lab, Samsung Semiconductor, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I2250650973"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I2250650973"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17888484,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":"1","first_page":"93","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.4607999920845032,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.4607999920845032,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.16660000383853912,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.06379999965429306,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7278000116348267},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5335000157356262},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.5300999879837036},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.47909998893737793},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.44190001487731934},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.4374000132083893},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4327999949455261},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.42579999566078186},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.41119998693466187}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8130999803543091},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7278000116348267},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5335000157356262},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.5300999879837036},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4973999857902527},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.47909998893737793},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.44190001487731934},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43799999356269836},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.4374000132083893},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4327999949455261},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42590001225471497},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.42579999566078186},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.41119998693466187},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.3736000061035156},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.3531999886035919},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.35190001130104065},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.35109999775886536},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.3422999978065491},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.3400999903678894},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.334199994802475},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.3125},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.30630001425743103},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.30090001225471497},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.2935999929904938},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29280000925064087},{"id":"https://openalex.org/C2781039887","wikidata":"https://www.wikidata.org/wiki/Q1391724","display_name":"Factor (programming language)","level":2,"score":0.28610000014305115},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2754000127315521},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.271699994802475},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.266400009393692},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.2603999972343445},{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.25769999623298645}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2026.3668463","is_oa":true,"landing_page_url":"https://doi.org/10.1109/lca.2026.3668463","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/lca.2026.3668463","is_oa":true,"landing_page_url":"https://doi.org/10.1109/lca.2026.3668463","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7996206879615784,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2087946700","https://openalex.org/W2594680891","https://openalex.org/W3199146566","https://openalex.org/W4387306324","https://openalex.org/W4391250471","https://openalex.org/W4399677840","https://openalex.org/W4411552953"],"related_works":[],"abstract_inverted_index":{"System":[0],"architectures":[1],"place":[2],"memory":[3,19,29,43,50,70],"in":[4,60,155,170,216],"close":[5],"proximity":[6],"of":[7,40,56,93,102,128,187,202],"CPU":[8],"to":[9,37,64,89,113,119,158],"achieve":[10],"high":[11,203],"performance.":[12,146],"However,":[13],"this":[14,145,192],"directly":[15],"and":[16,31,58,83,124,182,205],"locally":[17],"attached":[18],"comes":[20],"with":[21],"constraints.":[22,44],"Compute":[23],"Express":[24],"Link":[25],"(CXL)":[26],"enables":[27,144],"robust":[28],"disaggregation":[30],"thereby":[32,162],"opens":[33],"up":[34,118],"new":[35],"possibilities":[36],"address":[38],"some":[39],"the":[41,90,103,140,159,217],"direct-attached":[42],"Samsung":[45],"CMM-H":[46,104,107,210],"is":[47,111,139],"a":[48,61,66,99,152,212],"CXL":[49],"module":[51],"that":[52,143],"combines":[53],"best":[54],"aspects":[55],"DRAM":[57,137],"NAND":[59,161],"novel":[62],"architecture":[63],"provide":[65],"large":[67,135],"capacity":[68],"persistent":[69],"(PMEM)":[71],"solution.":[72,106],"While":[73],"NVMe":[74,114],"SSDs":[75],"offer":[76],"capacity,":[77],"they":[78],"suffer":[79],"from":[80],"higher":[81,176],"latency":[82],"inevitable":[84],"write":[85,164,207],"amplification":[86,165],"when":[87],"subjected":[88],"fine-grained":[91],"writes":[92],"data-intensive":[94],"workloads.":[95],"This":[96,199],"paper":[97],"presents":[98],"comprehensive":[100],"characterization":[101],"PMEM":[105,218],"device":[108,214],"performance":[109,204],"profile":[110],"compared":[112],"SSD.":[115],"It":[116],"achieves":[117,151],"100M":[120],"random":[121],"read":[122],"IOPS,":[123],"latencies":[125],"an":[126],"order":[127],"magnitude":[129],"lower":[130,179,183],"for":[131],"small":[132],"I/Os.":[133],"The":[134,147],"built-in":[136],"cache":[138],"architectural":[141],"mechanism":[142,149,193],"same":[148],"also":[150],"significant":[153,206],"reduction":[154,208],"data":[156],"written":[157],"backend":[160],"reducing":[163],"factor":[166],"(WAF).":[167],"Lower":[168],"WAF":[169,195],"turn":[171],"provides":[172],"benefits":[173],"such":[174],"as":[175,211],"media":[177],"endurance,":[178],"power":[180],"consumption,":[181],"latency.":[184],"Direct":[185],"measurement":[186],"real-world":[188],"case":[189],"studies":[190],"demonstrates":[191],"reduces":[194],"by":[196],"over":[197],"200x.":[198],"unique":[200],"combination":[201],"establishes":[209],"compelling":[213],"solution":[215],"landscape.":[219]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2026-02-28T00:00:00"}