{"id":"https://openalex.org/W7117151773","doi":"https://doi.org/10.1109/lca.2025.3647885","title":"CGR-NPU: A Hybrid CGRA and NPU Architecture for Adaptive Neural Computing Workloads","display_name":"CGR-NPU: A Hybrid CGRA and NPU Architecture for Adaptive Neural Computing Workloads","publication_year":2025,"publication_date":"2025-12-24","ids":{"openalex":"https://openalex.org/W7117151773","doi":"https://doi.org/10.1109/lca.2025.3647885"},"language":null,"primary_location":{"id":"doi:10.1109/lca.2025.3647885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3647885","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5121169731","display_name":"Junzhe Jing","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junzhe Jing","raw_affiliation_strings":["Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0009-5662-3366","affiliations":[{"raw_affiliation_string":"Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102213934","display_name":"Feng Min","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Feng Min","raw_affiliation_strings":["Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-0107-0196","affiliations":[{"raw_affiliation_string":"Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012891934","display_name":"Yiming Gan","orcid":"https://orcid.org/0000-0002-2033-5057"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yiming Gan","raw_affiliation_strings":["Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Ying Wang","orcid":"https://orcid.org/0000-0001-5172-4736"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ying Wang","raw_affiliation_strings":["Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0001-5172-4736","affiliations":[{"raw_affiliation_string":"Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"last","author":{"id":null,"display_name":"Yinhe Han","orcid":"https://orcid.org/0000-0003-0904-6681"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yinhe Han","raw_affiliation_strings":["Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-0904-6681","affiliations":[{"raw_affiliation_string":"Research Center for Intelligent Computing Systems, State Key Laboratory of Processors (SKLP), Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210090176"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.56084578,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":"1","first_page":"81","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.4885999858379364,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.4885999858379364,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.17149999737739563,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.10289999842643738,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.7366999983787537},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.6539999842643738},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6455000042915344},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5198000073432922},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5113000273704529},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.4537999927997589},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4535999894142151},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.41190001368522644},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4000999927520752}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8655999898910522},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.7366999983787537},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.6539999842643738},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6455000042915344},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5992000102996826},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5198000073432922},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5113000273704529},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.4537999927997589},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4535999894142151},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4251999855041504},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.41190001368522644},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4000999927520752},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.39500001072883606},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3937000036239624},{"id":"https://openalex.org/C144559511","wikidata":"https://www.wikidata.org/wiki/Q2986279","display_name":"Principal (computer security)","level":2,"score":0.38119998574256897},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.38109999895095825},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3788999915122986},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.36090001463890076},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.35010001063346863},{"id":"https://openalex.org/C98025372","wikidata":"https://www.wikidata.org/wiki/Q477538","display_name":"Systems architecture","level":3,"score":0.32739999890327454},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.32100000977516174},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.3199999928474426},{"id":"https://openalex.org/C32833848","wikidata":"https://www.wikidata.org/wiki/Q4115054","display_name":"Extensibility","level":2,"score":0.30149999260902405},{"id":"https://openalex.org/C29202148","wikidata":"https://www.wikidata.org/wiki/Q287260","display_name":"Resource allocation","level":2,"score":0.2971000075340271},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.2944999933242798},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2915000021457672},{"id":"https://openalex.org/C2780609101","wikidata":"https://www.wikidata.org/wiki/Q17156588","display_name":"Resource management (computing)","level":2,"score":0.2847999930381775},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2621000111103058},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.25440001487731934}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2025.3647885","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3647885","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2254397756","display_name":null,"funder_award_id":"U24A20291","funder_id":"https://openalex.org/F4320327720","funder_display_name":"Foundation for Innovative Research Groups of the National Natural Science Foundation of China"},{"id":"https://openalex.org/G2648887263","display_name":null,"funder_award_id":"62222411","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320327720","display_name":"Foundation for Innovative Research Groups of the National Natural Science Foundation of China","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"To":[0,41],"exploit":[1],"apabilities":[2],"of":[3,132],"processors":[4],"in":[5],"contemporary":[6],"heterogeneous":[7],"systems,":[8],"frequent":[9],"data":[10,24,125],"movement":[11],"across":[12],"disparate":[13],"memory":[14],"domains":[15],"is":[16,26,127],"required.":[17],"The":[18,64,118],"substantial":[19],"overhead":[20,119],"incurred":[21],"by":[22,109],"this":[23],"transfer":[25],"now":[27],"a":[28,47,53,59,78],"principal":[29],"bottleneck":[30],"for":[31,35,82,120],"system":[32],"performance,":[33],"especially":[34],"computationally":[36],"intensive,":[37],"large-scale":[38],"AI":[39],"workloads.":[40],"address":[42],"this,":[43],"we":[44],"propose":[45],"CGR-NPU,":[46],"hybrid":[48],"architecture":[49,65,98],"that":[50],"synergistically":[51],"combines":[52],"Coarse-Grained":[54],"Reconfigurable":[55],"Array":[56],"(CGRA)":[57],"with":[58,73],"Neural":[60],"Processing":[61],"Unit":[62],"(NPU).":[63],"features":[66],"tightly-coupled":[67],"CGRA":[68,114],"and":[69,76,105,123],"NPU":[70,116],"operational":[71],"modes":[72],"fast":[74],"switching,":[75],"leverages":[77],"reinforcement":[79],"learning-based":[80],"mechanism":[81],"dynamic":[83],"resource":[84],"allocation":[85],"tailored":[86],"to":[87,112],"workload":[88],"characteristics.":[89],"Evaluations":[90],"on":[91],"diverse":[92],"ML":[93],"benchmarks":[94],"show":[95],"our":[96],"integrated":[97],"improves":[99],"average":[100],"1.62\u00d7":[101],"performance":[102],"speed":[103],"up":[104],"reduces":[106],"silicon":[107],"area":[108],"48.4%":[110],"compared":[111],"standalone":[113],"or":[115],"baselines.":[117],"mode":[121],"switching":[122],"internal":[124],"handling":[126],"minimal,":[128],"constituting":[129],"only":[130],"7%":[131],"the":[133],"total":[134],"execution":[135],"time.":[136]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-12-24T00:00:00"}