{"id":"https://openalex.org/W4415367213","doi":"https://doi.org/10.1109/lca.2025.3623137","title":"A Partial Tag\u2013Data Decoupled Architecture for Last-Level Cache Optimization","display_name":"A Partial Tag\u2013Data Decoupled Architecture for Last-Level Cache Optimization","publication_year":2025,"publication_date":"2025-07-01","ids":{"openalex":"https://openalex.org/W4415367213","doi":"https://doi.org/10.1109/lca.2025.3623137"},"language":null,"primary_location":{"id":"doi:10.1109/lca.2025.3623137","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3623137","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Honghui Liu","orcid":"https://orcid.org/0009-0001-4605-4464"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Honghui Liu","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0009-0001-4605-4464","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022175129","display_name":"Xian Lin","orcid":"https://orcid.org/0000-0002-5780-5948"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xian Lin","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-5780-5948","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090873606","display_name":"Xin Zheng","orcid":"https://orcid.org/0000-0003-4931-9664"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xin Zheng","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0003-4931-9664","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102776408","display_name":"Qiancheng Liu","orcid":"https://orcid.org/0000-0001-9224-7577"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiancheng Liu","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103209489","display_name":"Huaien Gao","orcid":"https://orcid.org/0009-0001-0528-3076"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huaien Gao","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0009-0001-0528-3076","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050076555","display_name":"Shuting Cai","orcid":"https://orcid.org/0000-0002-2842-6439"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuting Cai","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-2842-6439","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007822830","display_name":"Xiaoming Xiong","orcid":"https://orcid.org/0000-0002-2421-7621"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoming Xiong","raw_affiliation_strings":["School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-2421-7621","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China","institution_ids":["https://openalex.org/I139024713"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I139024713"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.33837949,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"24","issue":"2","first_page":"333","last_page":"336"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.988099992275238,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.984000027179718,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7365999817848206},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.6039000153541565},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5795999765396118},{"id":"https://openalex.org/keywords/decoupling","display_name":"Decoupling (probability)","score":0.5665000081062317},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.5374000072479248},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4740000069141388},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.4724000096321106},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4602999985218048},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.42170000076293945}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8500000238418579},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7365999817848206},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6279000043869019},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.6039000153541565},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5795999765396118},{"id":"https://openalex.org/C205606062","wikidata":"https://www.wikidata.org/wiki/Q5249645","display_name":"Decoupling (probability)","level":2,"score":0.5665000081062317},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.5374000072479248},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4740000069141388},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.4724000096321106},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4602999985218048},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.42170000076293945},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.41179999709129333},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39649999141693115},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.39239999651908875},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.38670000433921814},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.37290000915527344},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.3596999943256378},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.35910001397132874},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.3327000141143799},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3273000121116638},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.3255000114440918},{"id":"https://openalex.org/C27602214","wikidata":"https://www.wikidata.org/wiki/Q1868547","display_name":"Locality of reference","level":3,"score":0.3176000118255615},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.2978000044822693},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.29339998960494995},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.2915000021457672},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.2858999967575073},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2851000130176544},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2676999866962433},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.25619998574256897},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.250900000333786}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2025.3623137","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3623137","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1977895217","https://openalex.org/W2061779882","https://openalex.org/W2159793853","https://openalex.org/W2170510345","https://openalex.org/W3043167609","https://openalex.org/W4241590855","https://openalex.org/W4253438286","https://openalex.org/W4398147724","https://openalex.org/W4401211857","https://openalex.org/W4404955015"],"related_works":[],"abstract_inverted_index":{"Modern":[0],"processors":[1],"rely":[2],"on":[3],"the":[4,9,14,21,55,90],"last-level":[5],"cache":[6,57],"to":[7],"bridge":[8],"growing":[10],"latency":[11],"gap":[12],"between":[13],"CPU":[15],"core":[16],"and":[17,38,100,115],"main":[18,56],"memory.":[19],"However,":[20],"memory":[22],"access":[23],"patterns":[24],"of":[25,98],"contemporary":[26],"applications":[27],"exhibit":[28],"increasing":[29],"complexity,":[30],"characterized":[31],"by":[32,82,113,120,128],"significant":[33],"temporal":[34,51],"locality,":[35],"irregular":[36],"reuse,":[37],"high":[39],"conflict":[40],"rates.":[41],"We":[42],"propose":[43],"a":[44,101],"partial":[45],"tag-data":[46],"decoupling":[47],"architecture":[48],"that":[49,89],"leverages":[50],"locality":[52],"without":[53,106],"modifying":[54],"structure":[58],"or":[59],"replacement":[60],"policy.":[61],"A":[62],"lightweight":[63],"auxiliary":[64],"tag":[65],"path":[66],"is":[67,71,117,126],"introduced,":[68],"where":[69],"data":[70],"allocated":[72],"only":[73],"upon":[74],"reuse":[75],"confirmation,":[76],"thus":[77],"minimizing":[78],"resource":[79],"waste":[80],"caused":[81],"low-reuse":[83],"blocks.":[84],"The":[85],"experimental":[86],"results":[87],"show":[88],"proposed":[91],"design":[92],"achieves":[93],"an":[94],"average":[95],"IPC":[96,111],"improvement":[97],"1.55%":[99],"5.33%":[102],"reduction":[103],"in":[104],"MPKI":[105,116],"prefetching.":[107],"With":[108],"prefetching":[109],"enabled,":[110],"improves":[112],"1.96%":[114],"further":[118],"reduced":[119],"10.91%,":[121],"while":[122],"overall":[123],"storage":[124],"overhead":[125],"decreased":[127],"approximately":[129],"2.59%.":[130]},"counts_by_year":[],"updated_date":"2025-11-06T23:17:08.748858","created_date":"2025-10-21T00:00:00"}