{"id":"https://openalex.org/W4414871635","doi":"https://doi.org/10.1109/lca.2025.3618627","title":"Efficient Deadlock Avoidance by Considering Stalling, Message Dependencies, and Topology","display_name":"Efficient Deadlock Avoidance by Considering Stalling, Message Dependencies, and Topology","publication_year":2025,"publication_date":"2025-07-01","ids":{"openalex":"https://openalex.org/W4414871635","doi":"https://doi.org/10.1109/lca.2025.3618627"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2025.3618627","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3618627","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043844834","display_name":"Sanya Srivastava","orcid":null},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sanya Srivastava","raw_affiliation_strings":["Duke University, Durham, NC, USA","Duke University, USA"],"affiliations":[{"raw_affiliation_string":"Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Duke University, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5119867936","display_name":"Fletch Rydell","orcid":null},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fletch Rydell","raw_affiliation_strings":["Duke University, Durham, NC, USA","Duke University, USA"],"affiliations":[{"raw_affiliation_string":"Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Duke University, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045703198","display_name":"Andr\u00e9s Goens","orcid":"https://orcid.org/0000-0002-0409-1363"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Andr\u00e9s Goens","raw_affiliation_strings":["University of Amsterdam, Amsterdam, The Netherlands","University of Amsterdam, Netherlands"],"affiliations":[{"raw_affiliation_string":"University of Amsterdam, Amsterdam, The Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"University of Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056071760","display_name":"Vijay Nagarajan","orcid":"https://orcid.org/0009-0000-5045-4754"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vijay Nagarajan","raw_affiliation_strings":["University of Utah, Salt Lake City, UT, USA","University of Utah, USA"],"affiliations":[{"raw_affiliation_string":"University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]},{"raw_affiliation_string":"University of Utah, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072847774","display_name":"Daniel J. Sorin","orcid":"https://orcid.org/0000-0001-7013-8986"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Daniel J. Sorin","raw_affiliation_strings":["Duke University, Durham, NC, USA","Duke University, USA"],"affiliations":[{"raw_affiliation_string":"Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]},{"raw_affiliation_string":"Duke University, USA","institution_ids":["https://openalex.org/I170897317"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5043844834"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.29904007,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"24","issue":"2","first_page":"305","last_page":"308"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.6815999746322632},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6273000240325928},{"id":"https://openalex.org/keywords/deadlock-prevention-algorithms","display_name":"Deadlock prevention algorithms","score":0.5185999870300293},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.5134000182151794},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.43560001254081726},{"id":"https://openalex.org/keywords/logical-topology","display_name":"Logical topology","score":0.3538999855518341}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8615000247955322},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.7242000102996826},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.6815999746322632},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6273000240325928},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.5684999823570251},{"id":"https://openalex.org/C113429609","wikidata":"https://www.wikidata.org/wiki/Q4060699","display_name":"Deadlock prevention algorithms","level":3,"score":0.5185999870300293},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.5134000182151794},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.43560001254081726},{"id":"https://openalex.org/C117729477","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Logical topology","level":3,"score":0.3538999855518341},{"id":"https://openalex.org/C84511453","wikidata":"https://www.wikidata.org/wiki/Q2914952","display_name":"Concurrency control","level":3,"score":0.3531000018119812},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.3393999934196472},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.2858000099658966},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.263700008392334},{"id":"https://openalex.org/C12269588","wikidata":"https://www.wikidata.org/wiki/Q132364","display_name":"Communications protocol","level":2,"score":0.2563999891281128}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2025.3618627","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2025.3618627","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2003409928","https://openalex.org/W2067776495","https://openalex.org/W2154323564","https://openalex.org/W2884810594","https://openalex.org/W2979714411","https://openalex.org/W3017153815","https://openalex.org/W3157297576","https://openalex.org/W3209605964","https://openalex.org/W4235172414","https://openalex.org/W4401211846"],"related_works":[],"abstract_inverted_index":{"Traditional":[0],"schemes":[1],"for":[2,7],"avoiding":[3],"deadlocks":[4,10,15,70],"compose":[5],"techniques":[6],"both":[8],"protocol":[9,30],"(virtual":[11,16],"networks)":[12],"and":[13,55,66],"network":[14],"channels).":[17],"Recent":[18],"work":[19],"has":[20],"shown":[21],"how":[22],"to":[23,53],"use":[24],"fewer":[25,73],"virtual":[26],"networks":[27],"by":[28],"analyzing":[29],"stalls":[31],"instead":[32],"of":[33,39,63],"just":[34],"considering":[35],"the":[36,76],"longest":[37],"chain":[38],"causally":[40],"dependent":[41],"messages.":[42],"We":[43],"identify":[44],"a":[45],"shortcoming":[46],"in":[47],"this":[48],"work,":[49],"which":[50],"can":[51,68],"lead":[52],"deadlocks,":[54],"show":[56],"that":[57],"combining":[58],"stall":[59],"analysis":[60],"with":[61],"analyses":[62],"message":[64],"dependencies":[65],"topology":[67],"avoid":[69],"while":[71],"using":[72],"buffers":[74],"than":[75],"conventional":[77],"approach.":[78]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
