{"id":"https://openalex.org/W4401111803","doi":"https://doi.org/10.1109/lca.2024.3435495","title":"LTE: Lightweight and Time-Efficient Hardware Encoder for Post-Quantum Scheme HQC","display_name":"LTE: Lightweight and Time-Efficient Hardware Encoder for Post-Quantum Scheme HQC","publication_year":2024,"publication_date":"2024-07-01","ids":{"openalex":"https://openalex.org/W4401111803","doi":"https://doi.org/10.1109/lca.2024.3435495"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2024.3435495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2024.3435495","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019885921","display_name":"Yazheng Tu","orcid":"https://orcid.org/0000-0002-1624-9500"},"institutions":[{"id":"https://openalex.org/I7863295","display_name":"Villanova University","ror":"https://ror.org/02g7kd627","country_code":"US","type":"education","lineage":["https://openalex.org/I7863295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yazheng Tu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA"],"raw_orcid":"https://orcid.org/0000-0002-1624-9500","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA","institution_ids":["https://openalex.org/I7863295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053238326","display_name":"Pengzhou He","orcid":"https://orcid.org/0000-0003-3461-4548"},"institutions":[{"id":"https://openalex.org/I7863295","display_name":"Villanova University","ror":"https://ror.org/02g7kd627","country_code":"US","type":"education","lineage":["https://openalex.org/I7863295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pengzhou He","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA"],"raw_orcid":"https://orcid.org/0000-0003-3461-4548","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA","institution_ids":["https://openalex.org/I7863295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029335324","display_name":"Chip-Hong Chang","orcid":"https://orcid.org/0000-0002-8897-6176"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chip-Hong Chang","raw_affiliation_strings":["School of Electrical &#x0026; Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0002-8897-6176","affiliations":[{"raw_affiliation_string":"School of Electrical &#x0026; Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027261160","display_name":"Jiafeng Xie","orcid":"https://orcid.org/0000-0002-4814-1318"},"institutions":[{"id":"https://openalex.org/I7863295","display_name":"Villanova University","ror":"https://ror.org/02g7kd627","country_code":"US","type":"education","lineage":["https://openalex.org/I7863295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiafeng Xie","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA"],"raw_orcid":"https://orcid.org/0000-0002-4814-1318","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA","institution_ids":["https://openalex.org/I7863295"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7203,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.7545284,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":"23","issue":"2","first_page":"187","last_page":"190"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9882000088691711,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9882000088691711,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9764999747276306,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9587000012397766,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.7255232930183411},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7059653997421265},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.6796224117279053},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4453573226928711},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.434036523103714},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37315768003463745},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1543116569519043}],"concepts":[{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.7255232930183411},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7059653997421265},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.6796224117279053},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4453573226928711},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.434036523103714},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37315768003463745},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1543116569519043},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2024.3435495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2024.3435495","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G564173832","display_name":"EFFICIENT HARDWARE IMPLEMENTATION OF LATTICE-BASED POST-QUANTUM CRYPTOGRAPHY","funder_award_id":"60NANB20D203","funder_id":"https://openalex.org/F4320332178","funder_display_name":"National Institute of Standards and Technology"}],"funders":[{"id":"https://openalex.org/F4320332178","display_name":"National Institute of Standards and Technology","ror":"https://ror.org/05xpvk416"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1559823796","https://openalex.org/W2168676717","https://openalex.org/W2540113050","https://openalex.org/W3208274166","https://openalex.org/W3217272717","https://openalex.org/W4226261894","https://openalex.org/W4324116664","https://openalex.org/W4361861626","https://openalex.org/W4385080145","https://openalex.org/W4391916556","https://openalex.org/W6851701729"],"related_works":["https://openalex.org/W4390516098","https://openalex.org/W2181948922","https://openalex.org/W2384362569","https://openalex.org/W2142795561","https://openalex.org/W1975289146","https://openalex.org/W4205302943","https://openalex.org/W2561132942","https://openalex.org/W3155418658","https://openalex.org/W2363440576","https://openalex.org/W2352941988"],"abstract_inverted_index":{"Post-quantum":[0],"cryptography":[1],"(PQC)":[2],"has":[3],"gained":[4],"increasing":[5],"attention":[6],"across":[7],"the":[8,14,23,36,44,82,86,90,124,132],"hardware":[9,32,67,126,137],"research":[10],"community,":[11],"especially":[12],"after":[13],"National":[15],"Institute":[16],"of":[17,43,128],"Standards":[18],"and":[19,89,93,142,152],"Technology":[20],"(NIST)":[21],"started":[22],"PQC":[24,47],"standardization":[25],"process.":[26],"There":[27],"are,":[28],"however,":[29],"very":[30],"few":[31],"implementations":[33],"reported":[34,135],"for":[35,69,149],"Hamming":[37],"Quasi-Cyclic":[38],"(HQC),":[39],"which":[40],"is":[41,51,108],"one":[42],"NIST":[45],"fourth-round":[46],"candidates.":[48],"As":[49],"encoding":[50],"an":[52,99,112],"important":[53],"step":[54],"in":[55,145],"code-based":[56],"public":[57],"key":[58],"encryption":[59],"scheme,":[60],"this":[61],"paper":[62],"presents":[63],"aLightweight":[64],"andTime-Efficient":[65],"(LTE)":[66],"encoder":[68,88,107,130],"HQC.":[70],"Our":[71,120],"proposed":[72,105,125],"design":[73],"features":[74],"a":[75,94],"streamlined":[76],"data":[77],"flow":[78],"setup":[79],"to":[80,97,115],"manage":[81],"iterative":[83],"computations":[84],"between":[85],"Reed-Solomon":[87],"Reed-Muller":[91],"encoder,":[92],"detailed":[95],"analysis":[96],"obtain":[98],"optimized":[100],"Galois":[101],"field":[102],"multiplier.":[103],"The":[104],"LTE":[106],"also":[109],"implemented":[110],"on":[111],"FPGA":[113],"platform":[114],"demonstrate":[116],"its":[117],"area-time":[118],"efficiency.":[119],"evaluation":[121],"shows":[122],"that":[123],"implementation":[127,138],"HQC":[129],"outperforms":[131],"most":[133],"recently":[134],"state-of-the-art":[136],"with":[139],"34.5%,":[140],"26.7%,":[141],"35.2%":[143],"reduction":[144],"area-delay":[146],"product":[147],"(ADP)":[148],"hqc-128,":[150],"hqc-192,":[151],"hqc-256,":[153],"respectively.":[154]},"counts_by_year":[{"year":2025,"cited_by_count":3}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}
