{"id":"https://openalex.org/W3135352626","doi":"https://doi.org/10.1109/lca.2021.3061905","title":"MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator","display_name":"MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator","publication_year":2021,"publication_date":"2021-01-01","ids":{"openalex":"https://openalex.org/W3135352626","doi":"https://doi.org/10.1109/lca.2021.3061905","mag":"3135352626"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2021.3061905","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2021.3061905","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101920789","display_name":"Chao Yu","orcid":"https://orcid.org/0000-0002-2602-9798"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chao Yu","raw_affiliation_strings":["University of Virginia, Charlottesville, VA, USA"],"raw_orcid":"https://orcid.org/0000-0002-2602-9798","affiliations":[{"raw_affiliation_string":"University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038231705","display_name":"Sihang Liu","orcid":"https://orcid.org/0000-0001-9706-6177"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sihang Liu","raw_affiliation_strings":["University of Virginia, Charlottesville, VA, USA"],"raw_orcid":"https://orcid.org/0000-0001-9706-6177","affiliations":[{"raw_affiliation_string":"University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070152284","display_name":"Samira Khan","orcid":"https://orcid.org/0000-0002-0300-3034"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samira Khan","raw_affiliation_strings":["University of Virginia, Charlottesville, VA, USA"],"raw_orcid":"https://orcid.org/0000-0002-0300-3034","affiliations":[{"raw_affiliation_string":"University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I51556381"],"apc_list":null,"apc_paid":null,"fwci":3.0384,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.91386737,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"20","issue":"1","first_page":"54","last_page":"57"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8665217161178589},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6429305076599121},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6071803569793701},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.5235485434532166},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.4657951593399048},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43596789240837097},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.4131462275981903},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3570635914802551},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.32420408725738525},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.15438473224639893}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8665217161178589},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6429305076599121},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6071803569793701},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.5235485434532166},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.4657951593399048},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43596789240837097},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.4131462275981903},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3570635914802551},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.32420408725738525},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.15438473224639893},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2021.3061905","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2021.3061905","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6399999856948853}],"awards":[{"id":"https://openalex.org/G164031158","display_name":"SPX: Integrating Persistent Memory in the Cloud","funder_award_id":"1822965","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1523762318","https://openalex.org/W1807272711","https://openalex.org/W1981943579","https://openalex.org/W2022655850","https://openalex.org/W2034861439","https://openalex.org/W2086112773","https://openalex.org/W2113235308","https://openalex.org/W2118231264","https://openalex.org/W2904405156","https://openalex.org/W2946037574","https://openalex.org/W2952438573","https://openalex.org/W4256373055","https://openalex.org/W6638337918","https://openalex.org/W6655987917"],"related_works":["https://openalex.org/W2004241287","https://openalex.org/W2380576232","https://openalex.org/W2937054111","https://openalex.org/W2066223521","https://openalex.org/W2058958858","https://openalex.org/W1835805572","https://openalex.org/W2321534397","https://openalex.org/W1977572939","https://openalex.org/W2077601556","https://openalex.org/W2147788581"],"abstract_inverted_index":{"Processing-in-Memory":[0],"(PIM)":[1],"has":[2],"being":[3],"actively":[4],"studied":[5],"as":[6],"a":[7,23,55,65],"promising":[8],"solution":[9],"to":[10,27],"overcome":[11],"the":[12,48,86],"memory":[13,77],"wall":[14],"problem.":[15],"Therefore,":[16],"there":[17],"is":[18],"an":[19,92],"urgent":[20],"need":[21],"for":[22,54,95,103],"PIM":[24,40,57,66,81,97,104],"simulation":[25,88],"infrastructure":[26],"help":[28],"researchers":[29],"quickly":[30],"understand":[31],"existing":[32,39,101],"problems":[33],"and":[34,47,79,99],"verify":[35],"new":[36],"mechanisms.":[37],"However,":[38],"simulators":[41],"do":[42],"not":[43],"consider":[44],"architectural":[45],"details":[46,71],"programming":[49],"interface":[50,94],"that":[51,68,72],"are":[52],"necessary":[53],"practical":[56],"system.":[58],"In":[59],"this":[60],"letter,":[61],"we":[62],"present":[63],"MultiPIM,":[64],"simulator":[67],"models":[69],"microarchitectural":[70],"stem":[73],"from":[74],"supporting":[75],"multiple":[76],"stacks":[78],"massively-parallel":[80],"cores.":[82],"On":[83],"top":[84],"of":[85],"detailed":[87],"infrastructure,":[89],"MultiPIM":[90],"provides":[91],"easy-to-use":[93],"configuring":[96],"hardware":[98],"adapting":[100],"workloads":[102],"offloading.":[105]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":6},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":9},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}