{"id":"https://openalex.org/W3014135942","doi":"https://doi.org/10.1109/lca.2020.2983920","title":"Exploiting Thermal Transients With Deterministic Turbo Clock Frequency","display_name":"Exploiting Thermal Transients With Deterministic Turbo Clock Frequency","publication_year":2020,"publication_date":"2020-01-01","ids":{"openalex":"https://openalex.org/W3014135942","doi":"https://doi.org/10.1109/lca.2020.2983920","mag":"3014135942"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2020.2983920","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2020.2983920","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048383896","display_name":"Pierre Michaud","orcid":"https://orcid.org/0000-0001-7037-4014"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]},{"id":"https://openalex.org/I56067802","display_name":"Universit\u00e9 de Rennes","ror":"https://ror.org/015m7wh34","country_code":"FR","type":"education","lineage":["https://openalex.org/I56067802"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Pierre Michaud","raw_affiliation_strings":["Inria, Univ Rennes, CNRS, IRISA, Campus universitaire de Beaulieu, Rennes, France"],"raw_orcid":"https://orcid.org/0000-0001-7037-4014","affiliations":[{"raw_affiliation_string":"Inria, Univ Rennes, CNRS, IRISA, Campus universitaire de Beaulieu, Rennes, France","institution_ids":["https://openalex.org/I2802519937","https://openalex.org/I56067802","https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5048383896"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I2802519937","https://openalex.org/I56067802"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04033282,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":"1","first_page":"43","last_page":"46"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10998","display_name":"Heat Transfer and Optimization","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7786182165145874},{"id":"https://openalex.org/keywords/turbo","display_name":"Turbo","score":0.7361140847206116},{"id":"https://openalex.org/keywords/documentation","display_name":"Documentation","score":0.5809764862060547},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.514039158821106},{"id":"https://openalex.org/keywords/turbo-code","display_name":"Turbo code","score":0.4646569788455963},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1584717333316803},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.13423845171928406},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.125654935836792},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11928051710128784},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.119273841381073}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7786182165145874},{"id":"https://openalex.org/C2776240298","wikidata":"https://www.wikidata.org/wiki/Q1138513","display_name":"Turbo","level":2,"score":0.7361140847206116},{"id":"https://openalex.org/C56666940","wikidata":"https://www.wikidata.org/wiki/Q788790","display_name":"Documentation","level":2,"score":0.5809764862060547},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.514039158821106},{"id":"https://openalex.org/C114504821","wikidata":"https://www.wikidata.org/wiki/Q2164281","display_name":"Turbo code","level":3,"score":0.4646569788455963},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1584717333316803},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.13423845171928406},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.125654935836792},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11928051710128784},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.119273841381073},{"id":"https://openalex.org/C171146098","wikidata":"https://www.wikidata.org/wiki/Q124192","display_name":"Automotive engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/lca.2020.2983920","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2020.2983920","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-02562105v1","is_oa":false,"landing_page_url":"https://inria.hal.science/hal-02562105","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Computer Architecture Letters, 2020, 19 (1), pp.43-46. ⟨10.1109/LCA.2020.2983920⟩","raw_type":"Journal articles"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W607467417","https://openalex.org/W1997614394","https://openalex.org/W2007376044","https://openalex.org/W2060001192","https://openalex.org/W2070525241","https://openalex.org/W2075624358","https://openalex.org/W2078624863","https://openalex.org/W2111468482","https://openalex.org/W2769038840","https://openalex.org/W2886748868","https://openalex.org/W2942961753","https://openalex.org/W2993933223","https://openalex.org/W3148862943","https://openalex.org/W6771448706"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2618286804","https://openalex.org/W2116478666","https://openalex.org/W2535923291","https://openalex.org/W2593195270","https://openalex.org/W2103764150","https://openalex.org/W2010424581","https://openalex.org/W2111465178","https://openalex.org/W2101836519","https://openalex.org/W2147600706"],"abstract_inverted_index":{"Modern":[0],"microprocessors":[1],"feature":[2],"turbo":[3,37,45,65],"mechanisms":[4],"that":[5,46,55,77],"adjust":[6],"the":[7,23,52,72],"clock":[8],"frequency":[9],"dynamically":[10],"so":[11,81],"as":[12],"to":[13],"maximize":[14],"processor":[15],"performance":[16],"under":[17],"power":[18],"and":[19,54,68,74],"temperature":[20],"limits.":[21],"However,":[22],"documentation":[24],"for":[25],"commercial":[26],"chips":[27],"rarely":[28],"provides":[29],"more":[30],"than":[31],"a":[32],"superficial":[33],"description":[34],"of":[35,44],"how":[36],"works.":[38],"This":[39],"letter":[40],"highlights":[41],"certains":[42],"aspects":[43],"are":[47],"not":[48],"well":[49],"known":[50],"outside":[51],"industry":[53],"distinguish":[56],"it":[57],"from":[58,71],"dynamic":[59],"thermal":[60],"management.":[61],"A":[62],"plausible":[63],"open-source":[64],"is":[66],"proposed":[67],"described,":[69],"extrapolating":[70],"scarce":[73],"sparse":[75],"information":[76],"has":[78],"been":[79],"disclosed":[80],"far.":[82]},"counts_by_year":[],"updated_date":"2026-05-07T13:39:58.223016","created_date":"2025-10-10T00:00:00"}