{"id":"https://openalex.org/W2977003028","doi":"https://doi.org/10.1109/lca.2019.2942914","title":"Exploiting OS-Level Memory Offlining for DRAM Power Management","display_name":"Exploiting OS-Level Memory Offlining for DRAM Power Management","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2977003028","doi":"https://doi.org/10.1109/lca.2019.2942914","mag":"2977003028"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2019.2942914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2942914","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102015905","display_name":"Seunghak Lee","orcid":"https://orcid.org/0000-0003-2221-8433"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Seunghak Lee","raw_affiliation_strings":["Department of Information and Communication Engineering, DGIST, Daegu, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Information and Communication Engineering, DGIST, Daegu, Korea","institution_ids":["https://openalex.org/I193352282"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037648751","display_name":"Nam Sung Kim","orcid":"https://orcid.org/0000-0002-0442-5634"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nam Sung Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101885459","display_name":"Daehoon Kim","orcid":"https://orcid.org/0000-0003-0837-0877"},"institutions":[{"id":"https://openalex.org/I193352282","display_name":"Daegu Gyeongbuk Institute of Science and Technology","ror":"https://ror.org/03frjya69","country_code":"KR","type":"education","lineage":["https://openalex.org/I193352282"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Daehoon Kim","raw_affiliation_strings":["Department of Information and Communication Engineering, DGIST, Daegu, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Information and Communication Engineering, DGIST, Daegu, Korea","institution_ids":["https://openalex.org/I193352282"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102015905"],"corresponding_institution_ids":["https://openalex.org/I193352282"],"apc_list":null,"apc_paid":null,"fwci":0.9631,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.7406731,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"18","issue":"2","first_page":"141","last_page":"144"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8243012428283691},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.731914758682251},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.6237003207206726},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.598537027835846},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5646032691001892},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.4227210581302643},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.41062217950820923},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.3737267255783081},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.32897287607192993},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.324259877204895},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2755879759788513},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.2571931481361389},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.24991661310195923}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8243012428283691},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.731914758682251},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.6237003207206726},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.598537027835846},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5646032691001892},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.4227210581302643},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.41062217950820923},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.3737267255783081},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.32897287607192993},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.324259877204895},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2755879759788513},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.2571931481361389},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.24991661310195923},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2019.2942914","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2942914","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G4278702387","display_name":null,"funder_award_id":"2014-0-00065","funder_id":"https://openalex.org/F4320335489","funder_display_name":"Institute for Information and Communications Technology Promotion"},{"id":"https://openalex.org/G7193680843","display_name":null,"funder_award_id":"NRF-2017R1C1B2008571","funder_id":"https://openalex.org/F4320322120","funder_display_name":"National Research Foundation of Korea"}],"funders":[{"id":"https://openalex.org/F4320322120","display_name":"National Research Foundation of Korea","ror":"https://ror.org/013aysd81"},{"id":"https://openalex.org/F4320335489","display_name":"Institute for Information and Communications Technology Promotion","ror":"https://ror.org/01g0hqq23"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1979036247","https://openalex.org/W2036853599","https://openalex.org/W2100384468","https://openalex.org/W2127122252","https://openalex.org/W2135965542","https://openalex.org/W2147657366","https://openalex.org/W2162639668","https://openalex.org/W2343187072","https://openalex.org/W2592384782","https://openalex.org/W3147993829","https://openalex.org/W4244591065","https://openalex.org/W4251587770","https://openalex.org/W6675279647"],"related_works":["https://openalex.org/W2555826082","https://openalex.org/W4288804802","https://openalex.org/W4293430534","https://openalex.org/W4297812927","https://openalex.org/W2335743642","https://openalex.org/W2800412005","https://openalex.org/W2154976966","https://openalex.org/W2216509856","https://openalex.org/W2172300487","https://openalex.org/W2524946875"],"abstract_inverted_index":{"Power":[0],"and":[1,17,159],"energy":[2],"consumed":[3],"by":[4,193],"main":[5],"memory":[6,137,142,177,183],"systems":[7],"in":[8,39,57,66,144],"data-center":[9],"servers":[10],"have":[11],"increased":[12],"as":[13],"the":[14,29,34,40,95,102,122,135,145,149,166,171,174,181],"DRAM":[15,31,53,59,64,68,72,131],"capacity":[16,54],"bandwidth":[18],"increase.":[19],"Particularly,":[20],"background":[21,191],"power":[22,32,76,97,113,192],"accounts":[23],"for":[24,165],"a":[25,67,129,141,152,161],"considerable":[26],"fraction":[27,35],"of":[28,108,148,157],"total":[30],"consumption;":[33],"will":[36],"increase":[37],"further":[38],"near":[41],"future,":[42],"especially":[43],"when":[44,169],"slowing-down":[45],"technology":[46],"scaling":[47],"forces":[48],"us":[49],"to":[50,90,110,151],"provide":[51],"necessary":[52],"through":[55],"plugging":[56],"more":[58,63],"modules":[60],"or":[61,155],"stacking":[62],"chips":[65],"package.":[69],"Although":[70],"current":[71,182],"architecture":[73],"supports":[74],"low":[75],"states":[77],"at":[78],"rank":[79],"granularity":[80],"that":[81,127],"turn":[82],"off":[83],"some":[84],"components":[85],"during":[86],"idle":[87],"periods,":[88],"techniques":[89],"exploit":[91],"memory-level":[92],"parallelism":[93],"make":[94],"rank-granularity":[96],"state":[98,164],"become":[99],"ineffective.":[100],"Furthermore,":[101],"long":[103],"wake-up":[104],"latency":[105],"is":[106,128],"one":[107],"obstacles":[109],"adopting":[111],"aggressive":[112],"management":[114],"(PM)":[115],"with":[116,134],"deep":[117,162],"power-down":[118,163],"states.":[119],"By":[120],"tackling":[121],"limitations,":[123],"we":[124],"propose":[125],"OffDIMM":[126,139,189],"software-assisted":[130],"PM":[132],"collaborating":[133],"OS-level":[136,176],"onlining/offlining.":[138],"maps":[140],"block":[143],"address":[146],"space":[147],"OS":[150],"subarray":[153,167],"group":[154,168],"groups":[156],"DRAM,":[158],"sets":[160],"offlining":[170],"block.":[172],"Through":[173],"dynamic":[175],"onlining/offlining":[178],"based":[179],"on":[180,196],"usage,":[184],"our":[185],"experimental":[186],"results":[187],"show":[188],"reduces":[190],"24":[194],"percent":[195],"average":[197],"without":[198],"notable":[199],"performance":[200],"overheads.":[201]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
