{"id":"https://openalex.org/W2925767305","doi":"https://doi.org/10.1109/lca.2019.2908374","title":"A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration","display_name":"A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration","publication_year":2019,"publication_date":"2019-01-01","ids":{"openalex":"https://openalex.org/W2925767305","doi":"https://doi.org/10.1109/lca.2019.2908374","mag":"2925767305"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2019.2908374","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2908374","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065049461","display_name":"He Liu","orcid":"https://orcid.org/0000-0002-9117-5265"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"He Liu","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Dept. of Comput. Sci. & Tech, Tsinghua Univ., Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-9117-5265","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Tech, Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101477195","display_name":"Jianhui Han","orcid":"https://orcid.org/0000-0002-8705-134X"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianhui Han","raw_affiliation_strings":["Institute of Microelectronics, Tsinghua University, Beijing, China","Institute of Microelectronics Tsinghua University  Beijing China"],"raw_orcid":"https://orcid.org/0000-0002-8705-134X","affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute of Microelectronics Tsinghua University  Beijing China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016596981","display_name":"Youhui Zhang","orcid":"https://orcid.org/0000-0003-2333-3580"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Youhui Zhang","raw_affiliation_strings":["Department of Computer Science and Technology, Tsinghua University, Beijing, China","Dept. of Comput. Sci. & Tech, Tsinghua Univ., Beijing, China"],"raw_orcid":"https://orcid.org/0000-0003-2333-3580","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Tech, Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3655,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.56871656,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"18","issue":"1","first_page":"63","last_page":"66"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11948","display_name":"Machine Learning in Materials Science","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8540017604827881},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8242931962013245},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.6615155935287476},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.586837112903595},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.46668681502342224},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.4384174644947052},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.43315213918685913},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.43288546800613403},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42207515239715576},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.37825992703437805},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3590954542160034},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.28907155990600586},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16058984398841858},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10632029175758362}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8540017604827881},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8242931962013245},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.6615155935287476},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.586837112903595},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.46668681502342224},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.4384174644947052},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.43315213918685913},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.43288546800613403},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42207515239715576},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.37825992703437805},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3590954542160034},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.28907155990600586},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16058984398841858},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10632029175758362},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2019.2908374","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2908374","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5299999713897705,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1542981317","https://openalex.org/W1993163906","https://openalex.org/W2010202670","https://openalex.org/W2014402164","https://openalex.org/W2027342132","https://openalex.org/W2082311137","https://openalex.org/W2091777687","https://openalex.org/W2119144962","https://openalex.org/W2135465403","https://openalex.org/W2141546789","https://openalex.org/W2162651880","https://openalex.org/W2395566064","https://openalex.org/W2399958287","https://openalex.org/W2464177207","https://openalex.org/W2508602506","https://openalex.org/W2518281301","https://openalex.org/W2613205562","https://openalex.org/W2613989746","https://openalex.org/W2736591611","https://openalex.org/W2787759178","https://openalex.org/W2811080765","https://openalex.org/W2899771611","https://openalex.org/W2964299589","https://openalex.org/W3099743262","https://openalex.org/W4245731639","https://openalex.org/W4299322810","https://openalex.org/W6677580257","https://openalex.org/W6705165511","https://openalex.org/W6711716804","https://openalex.org/W6719768283","https://openalex.org/W6756040250"],"related_works":["https://openalex.org/W2054635671","https://openalex.org/W2545245183","https://openalex.org/W2350916061","https://openalex.org/W1970117475","https://openalex.org/W3161624601","https://openalex.org/W2078381924","https://openalex.org/W4298011929","https://openalex.org/W2626667124","https://openalex.org/W4206468571","https://openalex.org/W4388454170"],"abstract_inverted_index":{"ReRAM-based":[0],"neural":[1],"network":[2],"accelerators":[3],"(RNAs)":[4],"could":[5],"outshine":[6],"their":[7],"digital":[8],"counterparts":[9],"in":[10],"terms":[11],"of":[12,38,59,79,91],"computational":[13],"efficiency":[14],"and":[15,27,53,61,102,105],"performance":[16],"remarkably.":[17],"However,":[18],"some":[19],"open":[20],"software":[21],"tool":[22],"for":[23,40],"broad":[24],"architectural":[25,100],"exploration":[26,101],"end-to-end":[28,103],"evaluation":[29],"are":[30,63],"still":[31],"missing.":[32],"We":[33],"present":[34],"a":[35,45,50,54,92],"simulation":[36,90],"framework":[37,97],"RNA":[39],"CNN":[41],"inference":[42],"that":[43],"encompasses":[44],"ReRAM-aware":[46],"NN":[47],"training":[48,75],"tool,":[49],"CNN-oriented":[51],"mapper":[52],"micro-architecture":[55],"simulator.":[56],"Main":[57],"characteristics":[58],"ReRAM":[60],"circuits":[62],"reflected":[64],"by":[65,72,86],"the":[66,73,80,87],"configurable":[67],"simulator,":[68],"as":[69,71],"well":[70],"customized":[74],"algorithm.":[76],"The":[77],"function":[78],"simulator's":[81],"core":[82],"components":[83],"is":[84,109],"verified":[85],"corresponding":[88],"circuit":[89],"real":[93],"chip":[94],"design.":[95],"This":[96],"enables":[98],"comprehensive":[99],"evaluation,":[104],"it's":[106],"preliminary":[107],"version":[108],"available":[110],"at":[111],"https://github.com/CRAFT-THU/XB-Sim.":[112]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}