{"id":"https://openalex.org/W2912071625","doi":"https://doi.org/10.1109/lca.2019.2897299","title":"Detect DRAM Disturbance Error by Using Disturbance Bin Counters","display_name":"Detect DRAM Disturbance Error by Using Disturbance Bin Counters","publication_year":2019,"publication_date":"2019-01-01","ids":{"openalex":"https://openalex.org/W2912071625","doi":"https://doi.org/10.1109/lca.2019.2897299","mag":"2912071625"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2019.2897299","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2897299","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031481184","display_name":"Yicheng Wang","orcid":"https://orcid.org/0000-0003-1079-5591"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yicheng Wang","raw_affiliation_strings":["University of Illinois at Chicago, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois at Chicago, Chicago, IL, USA","institution_ids":["https://openalex.org/I39422238"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038945228","display_name":"Yang Liu","orcid":"https://orcid.org/0000-0002-7377-1418"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yang Liu","raw_affiliation_strings":["University of Illinois at Chicago, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois at Chicago, Chicago, IL, USA","institution_ids":["https://openalex.org/I39422238"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016789537","display_name":"Peiyun Wu","orcid":"https://orcid.org/0000-0001-5675-6454"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peiyun Wu","raw_affiliation_strings":["University of Illinois at Chicago, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois at Chicago, Chicago, IL, USA","institution_ids":["https://openalex.org/I39422238"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100423015","display_name":"Zhao Zhang","orcid":"https://orcid.org/0000-0002-2526-1712"},"institutions":[{"id":"https://openalex.org/I39422238","display_name":"University of Illinois Chicago","ror":"https://ror.org/02mpq6x41","country_code":"US","type":"education","lineage":["https://openalex.org/I39422238"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhao Zhang","raw_affiliation_strings":["University of Illinois at Chicago, Chicago, IL, USA"],"affiliations":[{"raw_affiliation_string":"University of Illinois at Chicago, Chicago, IL, USA","institution_ids":["https://openalex.org/I39422238"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5031481184"],"corresponding_institution_ids":["https://openalex.org/I39422238"],"apc_list":null,"apc_paid":null,"fwci":1.4002,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.85872862,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"18","issue":"1","first_page":"35","last_page":"38"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8611373901367188},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7461566925048828},{"id":"https://openalex.org/keywords/spec#","display_name":"Spec#","score":0.6348657011985779},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.622641921043396},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5555258989334106},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.49767449498176575},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47017544507980347},{"id":"https://openalex.org/keywords/dbc","display_name":"dBc","score":0.4552426040172577},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4335689842700958},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4184316396713257},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.41830724477767944},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39309534430503845},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34933722019195557},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.1927737295627594},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15820306539535522},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.12350240349769592},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.10615265369415283},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1051715612411499}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8611373901367188},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7461566925048828},{"id":"https://openalex.org/C2778565505","wikidata":"https://www.wikidata.org/wiki/Q2207566","display_name":"Spec#","level":2,"score":0.6348657011985779},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.622641921043396},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5555258989334106},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.49767449498176575},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47017544507980347},{"id":"https://openalex.org/C193523891","wikidata":"https://www.wikidata.org/wiki/Q1771950","display_name":"dBc","level":3,"score":0.4552426040172577},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4335689842700958},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4184316396713257},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.41830724477767944},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39309534430503845},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34933722019195557},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.1927737295627594},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15820306539535522},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.12350240349769592},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.10615265369415283},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1051715612411499},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2019.2897299","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2019.2897299","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.5199999809265137,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1515422725","https://openalex.org/W1597555784","https://openalex.org/W2049504176","https://openalex.org/W2158319074","https://openalex.org/W2512093185","https://openalex.org/W2525431465","https://openalex.org/W2625267941","https://openalex.org/W2778822934","https://openalex.org/W4245276998","https://openalex.org/W6827069628"],"related_works":["https://openalex.org/W1976244802","https://openalex.org/W2116506644","https://openalex.org/W4320351610","https://openalex.org/W2122646225","https://openalex.org/W4293430534","https://openalex.org/W3015923041","https://openalex.org/W4297812927","https://openalex.org/W2335743642","https://openalex.org/W2029945810","https://openalex.org/W3140615508"],"abstract_inverted_index":{"DRAM":[0,78,149],"disturbance":[1,57,150],"errors":[2,151],"are":[3],"increasingly":[4],"a":[5,16,39,49,53,64,75,125,141],"concern":[6],"to":[7,20,105,144],"computer":[8],"system":[9],"reliability":[10],"and":[11,22,41,91],"security.":[12],"There":[13],"have":[14],"been":[15],"number":[17],"of":[18,72,77,88,148],"designs":[19],"detect":[21],"prevent":[23],"them;":[24],"however,":[25],"there":[26],"lacks":[27],"any":[28],"design":[29,50,98,136],"that":[30,67,119],"guarantees":[31],"100":[32],"percent":[33],"detection":[34,147],"(no":[35],"false":[36,121],"negative)":[37],"with":[38,124],"small":[40],"fixed":[42],"hardware":[43],"cost.":[44],"This":[45],"paper":[46],"presents":[47],"such":[48],"based":[51],"on":[52],"novel":[54],"idea":[55],"called":[56],"bin":[58,76],"counter":[59,66],"(DBC).":[60],"Each":[61],"DBC":[62,127],"is":[63,82,99],"complex":[65],"maintains":[68],"an":[69],"upper":[70],"bound":[71],"disturbances":[73],"for":[74],"rows.":[79],"Their":[80],"access":[81],"not":[83],"in":[84],"the":[85,102,107,146],"critical":[86],"path":[87],"processor":[89],"execution":[90],"thus":[92],"incurs":[93],"no":[94,120],"performance":[95],"overhead.":[96],"The":[97,135],"optimized":[100],"at":[101],"circuit":[103],"level":[104],"minimize":[106],"storage":[108],"requirement.":[109],"Our":[110],"simulation":[111],"results":[112],"using":[113],"multi-core":[114],"SPEC":[115],"CPU2006":[116],"workloads":[117],"show":[118],"positive":[122],"occurs":[123],"1,024-entry":[126],"table,":[128],"which":[129],"requires":[130],"only":[131],"4.5":[132],"KB":[133],"storage.":[134],"can":[137],"be":[138],"incorporated":[139],"into":[140],"memory":[142],"controller":[143],"guarantee":[145],"or":[152],"row":[153],"hammering":[154],"by":[155],"malicious":[156],"programs.":[157]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}