{"id":"https://openalex.org/W2901309973","doi":"https://doi.org/10.1109/lca.2018.2865552","title":"ReDRAM: A Reconfigurable DRAM Cache for GPGPUs","display_name":"ReDRAM: A Reconfigurable DRAM Cache for GPGPUs","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2901309973","doi":"https://doi.org/10.1109/lca.2018.2865552","mag":"2901309973"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2018.2865552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2018.2865552","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089572383","display_name":"Debiprasanna Sahoo","orcid":"https://orcid.org/0000-0003-1438-0617"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Debiprasanna Sahoo","raw_affiliation_strings":["Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0003-1438-0617","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081138994","display_name":"Swaraj Sha","orcid":"https://orcid.org/0000-0003-2886-791X"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Swaraj Sha","raw_affiliation_strings":["Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India"],"raw_orcid":"https://orcid.org/0000-0003-2886-791X","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044304689","display_name":"Manoranjan Satpathy","orcid":"https://orcid.org/0000-0002-9237-0978"},"institutions":[{"id":"https://openalex.org/I99729588","display_name":"Indian Institute of Technology Bhubaneswar","ror":"https://ror.org/04gx72j20","country_code":"IN","type":"education","lineage":["https://openalex.org/I99729588"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manoranjan Satpathy","raw_affiliation_strings":["Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Bhubaneswar, Bhubaneswar, Odisha, India","institution_ids":["https://openalex.org/I99729588"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001143341","display_name":"Madhu Mutyam","orcid":"https://orcid.org/0000-0003-1638-4195"},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"education","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Madhu Mutyam","raw_affiliation_strings":["Indian Institute of Technology Madras, Chennai, Tamil Nadu, India"],"raw_orcid":"https://orcid.org/0000-0003-1638-4195","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Madras, Chennai, Tamil Nadu, India","institution_ids":["https://openalex.org/I24676775"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4612,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6409977,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"17","issue":"2","first_page":"213","last_page":"216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.899112343788147},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7739415168762207},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7157050371170044},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6646810173988342},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.4910697937011719},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.453400582075119},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.45055508613586426},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44364655017852783},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.43025699257850647},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37111416459083557},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3552231788635254},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2469153106212616},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.10885953903198242}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.899112343788147},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7739415168762207},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7157050371170044},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6646810173988342},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.4910697937011719},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.453400582075119},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.45055508613586426},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44364655017852783},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.43025699257850647},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37111416459083557},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3552231788635254},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2469153106212616},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.10885953903198242},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lca.2018.2865552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2018.2865552","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5899999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1979527452","https://openalex.org/W1984222112","https://openalex.org/W2001148043","https://openalex.org/W2036403064","https://openalex.org/W2080592089","https://openalex.org/W2080756995","https://openalex.org/W2148797773","https://openalex.org/W2169865228","https://openalex.org/W2330672121","https://openalex.org/W2349022273","https://openalex.org/W2791573157","https://openalex.org/W4249158358"],"related_works":["https://openalex.org/W2167303720","https://openalex.org/W2549803267","https://openalex.org/W2497617944","https://openalex.org/W1563139915","https://openalex.org/W2061075966","https://openalex.org/W3147501184","https://openalex.org/W4256652509","https://openalex.org/W2109715593","https://openalex.org/W2081416538","https://openalex.org/W2140219379"],"abstract_inverted_index":{"Hardware-based":[0],"DRAM":[1,10,43,66,81,130],"cache":[2,13,67,88],"techniques":[3],"for":[4,61,108],"GPGPUs":[5,62],"propose":[6,54],"to":[7,123],"use":[8,111],"GPU":[9,39,42,65,80,129],"as":[11,68,86],"a":[12,56,69,87,97],"of":[14,27,75,89,100],"the":[15,25,90,124],"host":[16,91],"(system)":[17],"memory.":[18,92],"However,":[19],"these":[20],"approaches":[21],"do":[22],"not":[23],"exploit":[24],"opportunity":[26],"allocating":[28],"store-before-load":[29,76,112],"data":[30,77,113],"(data":[31],"that":[32,44,103,110],"is":[33],"written":[34],"before":[35],"being":[36],"read":[37],"by":[38,114],"cores)":[40],"on":[41,127],"would":[45],"save":[46],"multiple":[47],"CPU-GPU":[48],"transactions.":[49],"In":[50],"this":[51],"context,":[52],"we":[53],"ReDRAM,":[55],"novel":[57],"memory":[58],"allocation":[59,74],"strategy":[60],"which":[63],"re-configures":[64],"heterogeneous":[70],"unit.":[71],"It":[72],"allows":[73],"directly":[78],"onto":[79],"and":[82,118],"also":[83],"utilizes":[84],"it":[85],"Our":[93],"simulation":[94],"results":[95],"using":[96],"modified":[98],"version":[99],"GPGPU-Sim":[101],"show":[102],"ReDRAM":[104],"can":[105],"improve":[106],"performance":[107],"applications":[109],"57.6":[115],"percent":[116],"(avg.)":[117],"4.85x":[119],"(max.)":[120],"when":[121],"compared":[122],"existing":[125],"proposals":[126],"state-of-the-art":[128],"caches.":[131]},"counts_by_year":[{"year":2019,"cited_by_count":2}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
