{"id":"https://openalex.org/W2609435066","doi":"https://doi.org/10.1109/lca.2017.2697863","title":"Enabling Massive Multi-Threading with Fast Hashing","display_name":"Enabling Massive Multi-Threading with Fast Hashing","publication_year":2017,"publication_date":"2017-04-25","ids":{"openalex":"https://openalex.org/W2609435066","doi":"https://doi.org/10.1109/lca.2017.2697863","mag":"2609435066"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2017.2697863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2017.2697863","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000554129","display_name":"Alberto Scionti","orcid":"https://orcid.org/0000-0002-8138-9403"},"institutions":[{"id":"https://openalex.org/I2800599128","display_name":"Istituto Superiore Mario Boella","ror":"https://ror.org/05y6jfx28","country_code":"IT","type":"facility","lineage":["https://openalex.org/I2800599128","https://openalex.org/I4210155299"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alberto Scionti","raw_affiliation_strings":["Istituto Superiore Mario Boella (ISMB), Turin, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Istituto Superiore Mario Boella (ISMB), Turin, Italy","institution_ids":["https://openalex.org/I2800599128"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063602818","display_name":"Somnath Mazumdar","orcid":"https://orcid.org/0000-0002-1751-2569"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Somnath Mazumdar","raw_affiliation_strings":["Universit\u00e0 degli Studi di Siena, Siena, SI, Italy"],"raw_orcid":"https://orcid.org/0000-0002-1751-2569","affiliations":[{"raw_affiliation_string":"Universit\u00e0 degli Studi di Siena, Siena, SI, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058698657","display_name":"St\u00e9phane Zuckerman","orcid":"https://orcid.org/0000-0002-8586-0477"},"institutions":[{"id":"https://openalex.org/I11957088","display_name":"Michigan Technological University","ror":"https://ror.org/0036rpn28","country_code":"US","type":"education","lineage":["https://openalex.org/I11957088"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stephane Zuckerman","raw_affiliation_strings":["Michigan Technological University, Houghton, MI"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Michigan Technological University, Houghton, MI","institution_ids":["https://openalex.org/I11957088"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8414,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.76022868,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"17","issue":"1","first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8967992067337036},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7188207507133484},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.6221461892127991},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.5139734148979187},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4806565046310425},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4668605625629425},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4529631435871124},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.359785795211792},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3346937298774719},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.30361607670783997}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8967992067337036},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7188207507133484},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.6221461892127991},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.5139734148979187},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4806565046310425},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4668605625629425},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4529631435871124},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.359785795211792},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3346937298774719},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.30361607670783997},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/lca.2017.2697863","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2017.2697863","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},{"id":"pmh:oai:digitalcommons.mtu.edu:michigantech-p-30046","is_oa":false,"landing_page_url":"https://digitalcommons.mtu.edu/michigantech-p/10744","pdf_url":null,"source":{"id":"https://openalex.org/S4377196391","display_name":"Digital Commons - Michigan Tech (Michigan Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I11957088","host_organization_name":"Michigan Technological University","host_organization_lineage":["https://openalex.org/I11957088"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Michigan Tech Publications, Part 1","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1559577056","https://openalex.org/W1815597787","https://openalex.org/W1893534197","https://openalex.org/W2073983509","https://openalex.org/W2089083257","https://openalex.org/W2100092435","https://openalex.org/W2101431901","https://openalex.org/W2105524676","https://openalex.org/W2124624145","https://openalex.org/W2149135813","https://openalex.org/W2520281558"],"related_works":["https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2153202644","https://openalex.org/W2010970156","https://openalex.org/W2105895556","https://openalex.org/W2733115356","https://openalex.org/W2377593213","https://openalex.org/W4235861380","https://openalex.org/W2106625514","https://openalex.org/W1993191611"],"abstract_inverted_index":{"The":[0,101],"next":[1],"generation":[2],"of":[3,13,21,25,59,117],"high-performance":[4],"computers":[5],"is":[6,73,104],"expected":[7,55],"to":[8,32,42,56,75,96],"execute":[9,76],"threads":[10,26,44,77],"in":[11],"orders":[12],"magnitude":[14],"higher":[15],"than":[16],"today's":[17],"systems.":[18,61],"Improper":[19],"management":[20,82],"such":[22],"huge":[23],"amount":[24],"can":[27,112],"create":[28],"resource":[29],"contention,":[30],"leading":[31],"overall":[33],"degraded":[34],"system":[35],"performance.":[36],"By":[37],"leveraging":[38],"more":[39],"practical":[40],"approaches":[41],"distribute":[43],"on":[45,121],"the":[46],"available":[47],"resources,":[48],"execution":[49,99],"models":[50],"and":[51],"manycore":[52,87],"chips":[53],"are":[54,94],"overcome":[57],"limitations":[58],"current":[60],"Here,":[62],"we":[63],"present":[64],"DELTA-a":[65],"Data-Enabled":[66],"muLti-Threaded":[67],"Architecture,":[68],"where":[69,90],"a":[70,86,114,122],"producer-consumer":[71],"scheme":[72],"used":[74],"via":[78],"complete":[79],"distributed":[80],"thread":[81],"mechanism.":[83],"We":[84],"consider":[85],"tiled-chip":[88],"architecture":[89],"Network-on-Chip":[91],"(NoC)":[92],"routers":[93],"extended":[95],"support":[97],"our":[98],"model.":[100],"proposed":[102],"extension":[103],"analysed,":[105],"while":[106],"simulation":[107],"results":[108],"confirm":[109],"that":[110],"DELTA":[111],"manage":[113],"large":[115],"number":[116],"simultaneous":[118],"threads,":[119],"relying":[120],"simple":[123],"hardware":[124],"structure.":[125]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}