{"id":"https://openalex.org/W2344724911","doi":"https://doi.org/10.1109/lca.2015.2499739","title":"Diversity: A Design Goal for Heterogeneous Processors","display_name":"Diversity: A Design Goal for Heterogeneous Processors","publication_year":2015,"publication_date":"2015-11-11","ids":{"openalex":"https://openalex.org/W2344724911","doi":"https://doi.org/10.1109/lca.2015.2499739","mag":"2344724911"},"language":"en","primary_location":{"id":"doi:10.1109/lca.2015.2499739","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2015.2499739","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://www.research.ed.ac.uk/en/publications/0345ab9c-115a-415d-b283-4eb3d17c2154","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070638037","display_name":"Erik Tomusk","orcid":"https://orcid.org/0009-0001-4422-0289"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Erik Tomusk","raw_affiliation_strings":["The University of Edinburgh, Edinburgh, Edinburgh, GB"],"affiliations":[{"raw_affiliation_string":"The University of Edinburgh, Edinburgh, Edinburgh, GB","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050229154","display_name":"Christophe Dubach","orcid":"https://orcid.org/0000-0003-4811-2469"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Christophe Dubach","raw_affiliation_strings":["The University of Edinburgh, Edinburgh, Edinburgh, GB"],"affiliations":[{"raw_affiliation_string":"The University of Edinburgh, Edinburgh, Edinburgh, GB","institution_ids":["https://openalex.org/I98677209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5070638037"],"corresponding_institution_ids":["https://openalex.org/I98677209"],"apc_list":null,"apc_paid":null,"fwci":0.9689,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.77786789,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"15","issue":"2","first_page":"81","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8368111848831177},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.7618753910064697},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.6199971437454224},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.6197127103805542},{"id":"https://openalex.org/keywords/performance-metric","display_name":"Performance metric","score":0.5135898590087891},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4762014150619507},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4598570466041565},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.44608157873153687},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44172099232673645},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3770074248313904},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3666227459907532},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1832396686077118}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8368111848831177},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.7618753910064697},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.6199971437454224},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.6197127103805542},{"id":"https://openalex.org/C2780898871","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Performance metric","level":2,"score":0.5135898590087891},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4762014150619507},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4598570466041565},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.44608157873153687},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44172099232673645},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3770074248313904},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3666227459907532},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1832396686077118},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/lca.2015.2499739","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lca.2015.2499739","pdf_url":null,"source":{"id":"https://openalex.org/S17643076","display_name":"IEEE Computer Architecture Letters","issn_l":"1556-6056","issn":["1556-6056","1556-6064","2473-2575"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Computer Architecture Letters","raw_type":"journal-article"},{"id":"pmh:oai:pure.ed.ac.uk:openaire/0345ab9c-115a-415d-b283-4eb3d17c2154","is_oa":true,"landing_page_url":"https://www.research.ed.ac.uk/en/publications/0345ab9c-115a-415d-b283-4eb3d17c2154","pdf_url":null,"source":{"id":"https://openalex.org/S4406922455","display_name":"Edinburgh Research Explorer","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tomusk, E, Dubach, C & O'Boyle, M 2016, 'Diversity: A Design Goal for Heterogeneous Processors', IEEE Computer Architecture Letters, vol. 15, no. 2, pp. 81 - 84. https://doi.org/10.1109/LCA.2015.2499739","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:pure.ed.ac.uk:publications/0345ab9c-115a-415d-b283-4eb3d17c2154","is_oa":false,"landing_page_url":"https://www.research.ed.ac.uk/portal/en/publications/diversity-a-design-goal-for-heterogeneous-processors(0345ab9c-115a-415d-b283-4eb3d17c2154).html","pdf_url":null,"source":{"id":"https://openalex.org/S4406922455","display_name":"Edinburgh Research Explorer","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"pmh:oai:pure.ed.ac.uk:openaire/0345ab9c-115a-415d-b283-4eb3d17c2154","is_oa":true,"landing_page_url":"https://www.research.ed.ac.uk/en/publications/0345ab9c-115a-415d-b283-4eb3d17c2154","pdf_url":null,"source":{"id":"https://openalex.org/S4406922455","display_name":"Edinburgh Research Explorer","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tomusk, E, Dubach, C & O'Boyle, M 2016, 'Diversity: A Design Goal for Heterogeneous Processors', IEEE Computer Architecture Letters, vol. 15, no. 2, pp. 81 - 84. https://doi.org/10.1109/LCA.2015.2499739","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G6368762450","display_name":null,"funder_award_id":"EP/K008730/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1809169466","https://openalex.org/W2028665553","https://openalex.org/W2085583524","https://openalex.org/W2106334424","https://openalex.org/W2120625156","https://openalex.org/W2124426020","https://openalex.org/W2131081741","https://openalex.org/W2147657366","https://openalex.org/W2170382128","https://openalex.org/W4302367531"],"related_works":["https://openalex.org/W2488897859","https://openalex.org/W1980146226","https://openalex.org/W2366027386","https://openalex.org/W2086205578","https://openalex.org/W2015504232","https://openalex.org/W2593142409","https://openalex.org/W2378666660","https://openalex.org/W2104543805","https://openalex.org/W2143904576","https://openalex.org/W1834141184"],"abstract_inverted_index":{"A":[0],"growing":[1],"number":[2],"of":[3,30,60,70,83],"processors":[4,40],"have":[5,65],"CPU":[6],"cores":[7,31,85],"that":[8,26,72,78,105,138],"implement":[9],"the":[10,50,58,68,118,130],"same":[11],"instruction":[12],"set":[13,29,82],"architecture":[14],"(ISA)":[15],"using":[16],"different":[17],"microarchitectures.":[18],"The":[19,126],"underlying":[20],"motivation":[21],"for":[22,140],"single-ISA":[23],"heterogeneity":[24,48],"is":[25,92,129],"a":[27,62,80,93,134],"diverse":[28,81],"can":[32,73],"enable":[33,87],"<italic":[34],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[35],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">runtime":[36],"flexibility</i>":[37],".":[38],"Modern":[39],"are":[41],"subject":[42],"to":[43,56,86,97,110],"strict":[44],"power":[45,71],"budgets,":[46],"and":[47],"provides":[49],"runtime":[51,91,141],"scheduler":[52],"with":[53],"more":[54],"latitude":[55],"decide":[57],"level":[59],"performance":[61],"program":[63,100],"should":[64],"based":[66],"on":[67],"amount":[69],"be":[74],"spent.":[75],"We":[76,102],"argue":[77],"selecting":[79],"heterogeneous":[84,135],"flexible":[88],"operation":[89],"at":[90],"non-trivial":[94],"problem":[95],"due":[96],"diversity":[98],"in":[99],"behavior.":[101],"further":[103],"show":[104],"common":[106],"evaluation":[107,124],"methods":[108],"lead":[109],"false":[111],"conclusions":[112],"about":[113],"diversity.":[114],"Finally,":[115],"we":[116],"suggest":[117],"KS":[119,127],"statistical":[120],"test":[121,128],"as":[122],"an":[123],"metric.":[125],"first":[131],"step":[132],"toward":[133],"design":[136],"methodology":[137],"optimizes":[139],"flexibility.":[142]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
