{"id":"https://openalex.org/W2943107424","doi":"https://doi.org/10.1109/latw.2019.8704636","title":"Identification of Logic Paths Influenced by Severe Coupling Capacitances","display_name":"Identification of Logic Paths Influenced by Severe Coupling Capacitances","publication_year":2019,"publication_date":"2019-03-01","ids":{"openalex":"https://openalex.org/W2943107424","doi":"https://doi.org/10.1109/latw.2019.8704636","mag":"2943107424"},"language":"en","primary_location":{"id":"doi:10.1109/latw.2019.8704636","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2019.8704636","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Latin American Test Symposium (LATS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074747135","display_name":"I. D. Meza-Ibarra","orcid":null},"institutions":[{"id":"https://openalex.org/I4061448","display_name":"Universidad de Sonora","ror":"https://ror.org/00c32gy34","country_code":"MX","type":"education","lineage":["https://openalex.org/I4061448"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"I. D. Meza-Ibarra","raw_affiliation_strings":["Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico","institution_ids":["https://openalex.org/I4061448"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038219219","display_name":"Victor Champac","orcid":"https://orcid.org/0000-0002-4440-3800"},"institutions":[{"id":"https://openalex.org/I4061448","display_name":"Universidad de Sonora","ror":"https://ror.org/00c32gy34","country_code":"MX","type":"education","lineage":["https://openalex.org/I4061448"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"V. Champac","raw_affiliation_strings":["Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico","institution_ids":["https://openalex.org/I4061448"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072866925","display_name":"R. G\u00f3mez-Fuentes","orcid":"https://orcid.org/0000-0003-4303-8036"},"institutions":[{"id":"https://openalex.org/I4061448","display_name":"Universidad de Sonora","ror":"https://ror.org/00c32gy34","country_code":"MX","type":"education","lineage":["https://openalex.org/I4061448"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"R. Gomez-Fuentes","raw_affiliation_strings":["Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico","institution_ids":["https://openalex.org/I4061448"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022267255","display_name":"J. R. Noriega","orcid":"https://orcid.org/0000-0001-6641-6576"},"institutions":[{"id":"https://openalex.org/I4061448","display_name":"Universidad de Sonora","ror":"https://ror.org/00c32gy34","country_code":"MX","type":"education","lineage":["https://openalex.org/I4061448"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"J. R. Noriega","raw_affiliation_strings":["Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico","institution_ids":["https://openalex.org/I4061448"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077033346","display_name":"A. Vera-Marquina","orcid":"https://orcid.org/0000-0002-1267-0090"},"institutions":[{"id":"https://openalex.org/I4061448","display_name":"Universidad de Sonora","ror":"https://ror.org/00c32gy34","country_code":"MX","type":"education","lineage":["https://openalex.org/I4061448"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"A. Vera-Marquina","raw_affiliation_strings":["Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico"],"affiliations":[{"raw_affiliation_string":"Dpto. de Investigaci\u00f3n en F\u00edsica, Universidad de Sonora, Hermosillo, M\u00e9xico","institution_ids":["https://openalex.org/I4061448"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5074747135"],"corresponding_institution_ids":["https://openalex.org/I4061448"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.03730759,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"17","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6513321399688721},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.633475124835968},{"id":"https://openalex.org/keywords/coupling","display_name":"Coupling (piping)","score":0.6092337965965271},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5923776030540466},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5416034460067749},{"id":"https://openalex.org/keywords/dijkstras-algorithm","display_name":"Dijkstra's algorithm","score":0.5177747011184692},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5158861875534058},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.47511157393455505},{"id":"https://openalex.org/keywords/identification","display_name":"Identification (biology)","score":0.4166103005409241},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.41370660066604614},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3386324644088745},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25260961055755615},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11565309762954712},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.10948553681373596},{"id":"https://openalex.org/keywords/shortest-path-problem","display_name":"Shortest path problem","score":0.08236411213874817},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.07621893286705017}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6513321399688721},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.633475124835968},{"id":"https://openalex.org/C131584629","wikidata":"https://www.wikidata.org/wiki/Q4308705","display_name":"Coupling (piping)","level":2,"score":0.6092337965965271},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5923776030540466},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5416034460067749},{"id":"https://openalex.org/C173870130","wikidata":"https://www.wikidata.org/wiki/Q8548","display_name":"Dijkstra's algorithm","level":4,"score":0.5177747011184692},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5158861875534058},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.47511157393455505},{"id":"https://openalex.org/C116834253","wikidata":"https://www.wikidata.org/wiki/Q2039217","display_name":"Identification (biology)","level":2,"score":0.4166103005409241},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.41370660066604614},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3386324644088745},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25260961055755615},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11565309762954712},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.10948553681373596},{"id":"https://openalex.org/C22590252","wikidata":"https://www.wikidata.org/wiki/Q1058754","display_name":"Shortest path problem","level":3,"score":0.08236411213874817},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.07621893286705017},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/latw.2019.8704636","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2019.8704636","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Latin American Test Symposium (LATS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W658797333","https://openalex.org/W1515088817","https://openalex.org/W1637395447","https://openalex.org/W1966624478","https://openalex.org/W2090927611","https://openalex.org/W2094318801","https://openalex.org/W2097800300","https://openalex.org/W2097811636","https://openalex.org/W2100783269","https://openalex.org/W2116673262","https://openalex.org/W2123000046","https://openalex.org/W2130915811","https://openalex.org/W2138689980","https://openalex.org/W2156849124","https://openalex.org/W2163484184","https://openalex.org/W2166230687","https://openalex.org/W2170851517","https://openalex.org/W2183752820","https://openalex.org/W2752885492","https://openalex.org/W3149844465","https://openalex.org/W3150249002","https://openalex.org/W4239470332","https://openalex.org/W4246219036","https://openalex.org/W6685295446","https://openalex.org/W6793805179"],"related_works":["https://openalex.org/W2379764279","https://openalex.org/W2360924501","https://openalex.org/W2766237626","https://openalex.org/W2372895815","https://openalex.org/W2167833628","https://openalex.org/W2349474539","https://openalex.org/W2366583813","https://openalex.org/W2155019192","https://openalex.org/W3215142653","https://openalex.org/W1487051936"],"abstract_inverted_index":{"Modern":[0],"integrated":[1],"circuits":[2],"present":[3],"complex":[4],"interconnect":[5,61],"structures,":[6],"in":[7,16,55],"which":[8],"the":[9,17],"signal":[10],"coupling":[11,88],"play":[12],"an":[13],"important":[14],"role":[15],"overall":[18],"circuit":[19,48],"behavior.":[20],"In":[21],"this":[22],"paper,":[23],"a":[24,79,83],"method":[25,42],"to":[26,46,59,74,94],"identify":[27],"those":[28,76],"logic":[29],"paths":[30,77],"more":[31],"significantly":[32],"influenced":[33],"by":[34],"signals":[35],"at":[36],"coupled":[37],"lines":[38],"is":[39,72,92],"presented.":[40],"This":[41,90],"can":[43,51],"be":[44,53],"used":[45,73],"validate":[47],"behavior":[49],"and":[50,65,82],"also":[52],"applied":[54,93],"testing":[56],"techniques":[57],"oriented":[58],"detect":[60],"defects":[62],"(e.g.":[63],"opens":[64],"short":[66],"defects).":[67],"A":[68],"modified":[69],"Dijkstra's":[70],"algorithm":[71],"find":[75],"between":[78],"primary":[80,84],"input":[81],"output":[85],"with":[86],"higher":[87],"capacitances.":[89],"methodology":[91],"ISCAS'85":[95],"benchmark":[96],"circuits.":[97]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
