{"id":"https://openalex.org/W2943092007","doi":"https://doi.org/10.1109/latw.2019.8704559","title":"NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip","display_name":"NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip","publication_year":2019,"publication_date":"2019-03-01","ids":{"openalex":"https://openalex.org/W2943092007","doi":"https://doi.org/10.1109/latw.2019.8704559","mag":"2943092007"},"language":"en","primary_location":{"id":"doi:10.1109/latw.2019.8704559","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2019.8704559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Latin American Test Symposium (LATS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032067628","display_name":"Alexandre Coelho","orcid":"https://orcid.org/0000-0001-8715-849X"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Alexandre Coelho","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109240766","display_name":"Nacer-Eddine Zergainoh","orcid":null},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Nacer-Eddine Zergainoh","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018591544","display_name":"Raoul Velazco","orcid":"https://orcid.org/0000-0002-0902-0783"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Raoul Velazco","raw_affiliation_strings":["Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Univ. Grenoble Alpes, CNRS, Grenoble INP (Institute of Engineering Univ. Grenoble Alpes), TIMA, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I899635006","https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3719,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.63236009,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7441996335983276},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.6796084642410278},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6608985662460327},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6098788380622864},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5617076754570007},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5579494833946228},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5107629299163818},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5004732608795166},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.4784826636314392},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.43251723051071167},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4169190526008606},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41523805260658264},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2185966968536377},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08469241857528687}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7441996335983276},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.6796084642410278},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6608985662460327},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6098788380622864},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5617076754570007},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5579494833946228},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5107629299163818},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5004732608795166},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.4784826636314392},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.43251723051071167},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4169190526008606},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41523805260658264},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2185966968536377},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08469241857528687},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/latw.2019.8704559","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2019.8704559","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Latin American Test Symposium (LATS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1603896912","https://openalex.org/W1965425138","https://openalex.org/W1975579687","https://openalex.org/W2016926482","https://openalex.org/W2023659251","https://openalex.org/W2027201456","https://openalex.org/W2028687031","https://openalex.org/W2053576538","https://openalex.org/W2098426274","https://openalex.org/W2107822077","https://openalex.org/W2115071828","https://openalex.org/W2128043874","https://openalex.org/W2146543277","https://openalex.org/W2159889776","https://openalex.org/W2160642395","https://openalex.org/W2290529364","https://openalex.org/W2539498163","https://openalex.org/W2560344270","https://openalex.org/W2562735887","https://openalex.org/W2594660560","https://openalex.org/W2744562207","https://openalex.org/W2769996234","https://openalex.org/W2798776715","https://openalex.org/W2803051631","https://openalex.org/W3147044877","https://openalex.org/W4248399907"],"related_works":["https://openalex.org/W1506159315","https://openalex.org/W3209275736","https://openalex.org/W2297417762","https://openalex.org/W1530804449","https://openalex.org/W2123076670","https://openalex.org/W2070693700","https://openalex.org/W2126475478","https://openalex.org/W2993028905","https://openalex.org/W2543290882","https://openalex.org/W2157878629"],"abstract_inverted_index":{"Networks-On-Chip":[0],"(NoCs)":[1],"have":[2],"emerged":[3],"as":[4,103,105,129,131],"a":[5,79,141],"promising":[6],"solution":[7,58],"to":[8,17,44,61,110,149],"replace":[9],"global":[10],"on-chip":[11],"interconnections":[12],"in":[13,71,114],"System-On-Chip":[14],"(SoC)":[15],"thanks":[16],"better":[18],"performance":[19],"and":[20,30,51,65,85],"lower":[21],"power.":[22],"However,":[23],"the":[24,31,49,63,68,72,94,99,106,115,118,124],"increasing":[25],"complexity":[26],"of":[27,34,67,74,126],"NoC":[28,69,146],"routers":[29],"continuous":[32],"miniaturization":[33],"silicon":[35],"technology":[36],"are":[37],"making":[38],"this":[39,77],"interconnection":[40],"circuit":[41],"increasingly":[42],"vulnerable":[43],"transient":[45],"faults.":[46,75],"Consequently,":[47],"during":[48],"design":[50,101,108],"verification":[52],"phase,":[53],"an":[54],"accurate":[55],"fault":[56,87,120],"injection":[57,88,121],"is":[59,89,147],"needed":[60],"assess":[62],"reliability":[64],"behavior":[66],"architecture":[70],"presence":[73],"In":[76],"paper,":[78],"hybrid":[80],"method":[81,92],"that":[82],"combines":[83],"FPGA-based":[84],"Layout-based":[86],"proposed.":[90],"This":[91],"manipulates":[93],"gate":[95],"netlist":[96],"provided":[97],"by":[98,134],"ASIC":[100],"flow":[102,109],"well":[104,130],"FPGA":[107],"emulate":[111],"soft":[112],"errors":[113],"Networks-on-Chip.":[116],"Furthermore,":[117],"automated":[119],"campaign":[122],"supports":[123],"emulation":[125],"single":[127],"faults":[128,133],"multiple":[132],"taking":[135],"cell":[136],"adjacency":[137],"into":[138],"account.":[139],"Finally,":[140],"case":[142],"study":[143],"using":[144],"two-dimensional":[145],"used":[148],"validate":[150],"our":[151],"methodology.":[152]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
