{"id":"https://openalex.org/W2128055202","doi":"https://doi.org/10.1109/latw.2014.6841912","title":"Low cost fault detector guided by permanent faults at the end of FPGAs life cycle","display_name":"Low cost fault detector guided by permanent faults at the end of FPGAs life cycle","publication_year":2014,"publication_date":"2014-03-01","ids":{"openalex":"https://openalex.org/W2128055202","doi":"https://doi.org/10.1109/latw.2014.6841912","mag":"2128055202"},"language":"en","primary_location":{"id":"doi:10.1109/latw.2014.6841912","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2014.6841912","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 15th Latin American Test Workshop - LATW","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075323167","display_name":"Victor M. Goncalves Martins","orcid":null},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Victor M. Goncalves Martins","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, 88040-900 Floriano\u00b4polis, Santa Catarina - Brazil","Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, 88040-900 Floriano\u00b4polis, Santa Catarina - Brazil","institution_ids":["https://openalex.org/I4104125"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil","institution_ids":["https://openalex.org/I4104125"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012128733","display_name":"Frederico Ferlini","orcid":"https://orcid.org/0000-0002-9550-1822"},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Frederico Ferlini","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil","institution_ids":["https://openalex.org/I4104125"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032411828","display_name":"Djones Lettnin","orcid":null},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Djones Vinicius Lettnin","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil","institution_ids":["https://openalex.org/I4104125"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002595177","display_name":"Eduardo Augusto Bezerra","orcid":"https://orcid.org/0000-0002-2191-6064"},"institutions":[{"id":"https://openalex.org/I4104125","display_name":"Universidade Federal de Santa Catarina","ror":"https://ror.org/041akq887","country_code":"BR","type":"education","lineage":["https://openalex.org/I4104125"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Augusto Bezerra","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Federal University of Santa Catarina, Florian\u00f3polis, Santa Catarina, Brazil","institution_ids":["https://openalex.org/I4104125"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Fed. Univ. of Santa Catarina, Florianopolis, Brazil","institution_ids":["https://openalex.org/I4104125"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5075323167"],"corresponding_institution_ids":["https://openalex.org/I4104125"],"apc_list":null,"apc_paid":null,"fwci":0.628,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.74546911,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8488281965255737},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.73297518491745},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7182629704475403},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6185617446899414},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46314167976379395},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.4564135670661926},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.41075652837753296}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8488281965255737},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.73297518491745},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7182629704475403},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6185617446899414},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46314167976379395},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.4564135670661926},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.41075652837753296},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/latw.2014.6841912","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2014.6841912","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 15th Latin American Test Workshop - LATW","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6000000238418579,"display_name":"Responsible consumption and production","id":"https://metadata.un.org/sdg/12"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322025","display_name":"Conselho Nacional de Desenvolvimento Cient\u00edfico e Tecnol\u00f3gico","ror":"https://ror.org/03swz6y49"},{"id":"https://openalex.org/F4320337392","display_name":"Division of Electrical, Communications and Cyber Systems","ror":"https://ror.org/01krpsy48"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1484771588","https://openalex.org/W1881430677","https://openalex.org/W2029915748","https://openalex.org/W2138809243","https://openalex.org/W2145071552","https://openalex.org/W2158886939","https://openalex.org/W2164986329","https://openalex.org/W2169952903","https://openalex.org/W4241244621","https://openalex.org/W6684037805"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2096938998","https://openalex.org/W1760305469","https://openalex.org/W1574948540","https://openalex.org/W2103526090"],"abstract_inverted_index":{"Field":[0],"Programmable":[1],"Gate":[2],"Arrays":[3],"(FPGAs),":[4],"as":[5],"any":[6],"other":[7],"electronic":[8],"devices,":[9],"are":[10,119],"designed":[11],"according":[12],"to":[13,27,69,135,171],"some":[14],"life":[15,56],"expectancy":[16],"figures.":[17],"For":[18],"this":[19,38,105],"reason,":[20],"its":[21],"lifetime":[22],"is":[23,79,111,131,144,169],"finite":[24],"given":[25],"due":[26],"appearance":[28],"of":[29,49,54,65,83,104,164,177,187,191],"faults":[30,50],"caused":[31],"by":[32],"the":[33,52,95,114,124,137,147,161,165,181,189,192],"natural":[34],"physical":[35,138],"degradation.":[36],"In":[37],"paper,":[39],"we":[40],"present":[41],"a":[42,63,75,81,89,107,157],"low":[43],"cost":[44],"solution":[45],"for":[46],"autonomous":[47],"detection":[48,142],"at":[51],"end":[53],"FPGAs":[55,96],"cycle.":[57],"Our":[58],"proposed":[59],"methodology":[60],"starts":[61],"from":[62],"pre-analysis":[64],"memory":[66,85,163],"elements":[67],"belonging":[68],"modules":[70],"under":[71],"verification.":[72],"Then,":[73],"with":[74,156,184],"proper":[76],"organization,":[77],"it":[78,168],"created":[80],"list":[82],"all":[84],"elements,":[86],"controlled":[87],"through":[88],"Built-In":[90],"Self-Test":[91],"(BIST)":[92],"implementation":[93],"via":[94],"Internal":[97],"Configuration":[98],"Access":[99],"Port":[100],"(ICAP).":[101],"By":[102],"means":[103,129],"list,":[106],"virtual":[108],"scan":[109,139],"chain":[110],"created,":[112],"where":[113],"vectors":[115],"(test":[116],"and":[117,121],"result)":[118],"written":[120],"read":[122],"using":[123],"FPGA":[125],"reconfiguration":[126],"capabilities,":[127],"which":[128],"there":[130],"no":[132,185],"extra":[133],"hardware":[134,175],"create":[136],"chain.":[140],"The":[141,152],"algorithm":[143],"implemented":[145],"in":[146,160,180],"available":[148],"system":[149],"processing":[150],"unit.":[151],"results":[153],"show":[154],"that":[155],"minor":[158],"increase":[159],"program":[162],"digital":[166],"design,":[167],"possible":[170],"perform":[172],"an":[173],"offline":[174],"testing":[176],"each":[178],"sub-module":[179],"existing":[182],"FPGA,":[183],"need":[186],"stopping":[188],"remaining":[190],"system.":[193]},"counts_by_year":[{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
