{"id":"https://openalex.org/W2047041527","doi":"https://doi.org/10.1109/latw.2012.6261231","title":"Low voltage testing for interconnect opens under process variations","display_name":"Low voltage testing for interconnect opens under process variations","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2047041527","doi":"https://doi.org/10.1109/latw.2012.6261231","mag":"2047041527"},"language":"en","primary_location":{"id":"doi:10.1109/latw.2012.6261231","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2012.6261231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 13th Latin American Test Workshop (LATW)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083880522","display_name":"Jesus Moreno","orcid":null},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"Jesus Moreno","raw_affiliation_strings":["Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics \u2013 INAOE, Puebla, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]},{"raw_affiliation_string":"Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics \u2013 INAOE, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038219219","display_name":"Victor Champac","orcid":"https://orcid.org/0000-0002-4440-3800"},"institutions":[{"id":"https://openalex.org/I39824353","display_name":"National Institute of Astrophysics, Optics and Electronics","ror":"https://ror.org/00bpmmc63","country_code":"MX","type":"facility","lineage":["https://openalex.org/I39824353"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Victor Champac","raw_affiliation_strings":["Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics \u2013 INAOE, Puebla, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]},{"raw_affiliation_string":"Department of Electronic Engineering, National Institute for Astrophysics, Optics and Electronics \u2013 INAOE, Puebla, Mexico","institution_ids":["https://openalex.org/I39824353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069159925","display_name":"M. Renovell","orcid":"https://orcid.org/0000-0002-3896-8231"},"institutions":[{"id":"https://openalex.org/I19894307","display_name":"Universit\u00e9 de Montpellier","ror":"https://ror.org/051escj72","country_code":"FR","type":"education","lineage":["https://openalex.org/I19894307"]},{"id":"https://openalex.org/I4210101743","display_name":"Laboratoire d'Informatique, de Robotique et de Micro\u00e9lectronique de Montpellier","ror":"https://ror.org/013yean28","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I151295451","https://openalex.org/I19894307","https://openalex.org/I4210101743","https://openalex.org/I4210159245","https://openalex.org/I4412460525"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Michel Renovell","raw_affiliation_strings":["LIRMM, Universite de Montpellier II, Montpellier, France","LIRMM-Universite de Montpellier II, 161 rue Ada 34392, France"],"affiliations":[{"raw_affiliation_string":"LIRMM, Universite de Montpellier II, Montpellier, France","institution_ids":["https://openalex.org/I19894307","https://openalex.org/I4210101743"]},{"raw_affiliation_string":"LIRMM-Universite de Montpellier II, 161 rue Ada 34392, France","institution_ids":["https://openalex.org/I19894307"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5083880522"],"corresponding_institution_ids":["https://openalex.org/I39824353"],"apc_list":null,"apc_paid":null,"fwci":0.2901,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.56417463,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"17","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7687129974365234},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7272853851318359},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6050362586975098},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5824815034866333},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5635984539985657},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5250301957130432},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.49493998289108276},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3584238886833191},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17843621969223022},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10250234603881836}],"concepts":[{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7687129974365234},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7272853851318359},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6050362586975098},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5824815034866333},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5635984539985657},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5250301957130432},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.49493998289108276},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3584238886833191},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17843621969223022},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10250234603881836},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/latw.2012.6261231","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latw.2012.6261231","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 13th Latin American Test Workshop (LATW)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321739","display_name":"Consejo Nacional de Ciencia y Tecnolog\u00eda","ror":"https://ror.org/059ex5q34"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W164528542","https://openalex.org/W1491093261","https://openalex.org/W1515088817","https://openalex.org/W1667165204","https://openalex.org/W1727912659","https://openalex.org/W1735018384","https://openalex.org/W1958909498","https://openalex.org/W1974887607","https://openalex.org/W1991398325","https://openalex.org/W2008534549","https://openalex.org/W2049269261","https://openalex.org/W2090927611","https://openalex.org/W2102186636","https://openalex.org/W2128626389","https://openalex.org/W2137552141","https://openalex.org/W2157210245","https://openalex.org/W2160968649","https://openalex.org/W2169294720","https://openalex.org/W4212961314","https://openalex.org/W4234217119"],"related_works":["https://openalex.org/W2378211422","https://openalex.org/W4321353415","https://openalex.org/W2745001401","https://openalex.org/W2130974462","https://openalex.org/W2028665553","https://openalex.org/W2086519370","https://openalex.org/W4246352526","https://openalex.org/W2121910908","https://openalex.org/W915438175","https://openalex.org/W2146056662"],"abstract_inverted_index":{"Advances":[0],"in":[1,37,93,118],"test":[2,122,137],"methodologies":[3],"to":[4,97,125,135],"deal":[5],"with":[6,120],"subtle":[7],"behavior":[8],"of":[9,32,48,59,81,83,101,103,129,131],"some":[10,107],"defects":[11],"mechanisms":[12],"as":[13],"the":[14,56,79,84,99,127],"technology":[15],"scale":[16],"are":[17,23],"required.":[18],"Among":[19],"these":[20],"interconnect":[21,64,132],"opens":[22,105,133],"an":[24],"important":[25],"defect":[26,85],"mechanism":[27],"that":[28,114],"requires":[29],"detailed":[30],"knowledge":[31],"its":[33],"physical":[34],"properties.":[35],"Furthermore,":[36],"nanometer":[38],"process":[39,67],"variability":[40],"is":[41,50,69,86,91],"predominant":[42],"and":[43],"considering":[44,66],"only":[45],"nominal":[46],"value":[47],"parameters":[49],"not":[51],"realistic.":[52],"In":[53],"this":[54,78],"work":[55],"detection":[57,102],"capability":[58],"Low":[60,116],"Voltage":[61],"Testing":[62],"for":[63,77,106],"opens,":[65],"variations,":[68],"evaluated":[70],"using":[71,115],"a":[72,94],"statistical":[73],"model.":[74],"To":[75],"account":[76],"Probability":[80,128],"Detection":[82,130],"obtained.":[87],"The":[88,111],"proposed":[89],"methodology":[90],"implemented":[92],"software":[95],"tool":[96],"determine":[98],"probability":[100],"via":[104],"ISCAS85":[108],"benchmark":[109],"circuits.":[110],"results":[112],"suggest":[113],"Vdd":[117],"conjunction":[119],"favorable":[121],"vectors":[123],"allow":[124],"improve":[126],"leading":[134],"better":[136],"quality.":[138]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
