{"id":"https://openalex.org/W4312613871","doi":"https://doi.org/10.1109/lats57337.2022.9936975","title":"A novel Pattern Selection Algorithm to reduce the Test Cost of large Automotive Systems-on-Chip","display_name":"A novel Pattern Selection Algorithm to reduce the Test Cost of large Automotive Systems-on-Chip","publication_year":2022,"publication_date":"2022-09-05","ids":{"openalex":"https://openalex.org/W4312613871","doi":"https://doi.org/10.1109/lats57337.2022.9936975"},"language":"en","primary_location":{"id":"doi:10.1109/lats57337.2022.9936975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lats57337.2022.9936975","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 23rd Latin American Test Symposium (LATS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050269605","display_name":"G. Iaria","orcid":"https://orcid.org/0000-0002-4018-3820"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"G. Iaria","raw_affiliation_strings":["Politecnico di Torino,Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060364710","display_name":"Francesco Angione","orcid":"https://orcid.org/0000-0003-2978-1130"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"F. Angione","raw_affiliation_strings":["Politecnico di Torino,Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049430681","display_name":"Paolo Bernardi","orcid":"https://orcid.org/0000-0002-0985-9327"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"P. Bernardi","raw_affiliation_strings":["Politecnico di Torino,Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Sonza Reorda","raw_affiliation_strings":["Politecnico di Torino,Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024226992","display_name":"D. Appello","orcid":"https://orcid.org/0000-0001-8178-2785"},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"D. Appello","raw_affiliation_strings":["ST Microelectronics,Italy","ST Microelectronics, Italy"],"affiliations":[{"raw_affiliation_string":"ST Microelectronics,Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"ST Microelectronics, Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081474472","display_name":"G. Garozzo","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Garozzo","raw_affiliation_strings":["ST Microelectronics,Italy","ST Microelectronics, Italy"],"affiliations":[{"raw_affiliation_string":"ST Microelectronics,Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"ST Microelectronics, Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043908290","display_name":"Vincenzo Tancorre","orcid":"https://orcid.org/0000-0001-7959-0784"},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"V. Tancorre","raw_affiliation_strings":["ST Microelectronics,Italy","ST Microelectronics, Italy"],"affiliations":[{"raw_affiliation_string":"ST Microelectronics,Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"ST Microelectronics, Italy","institution_ids":["https://openalex.org/I4210154781"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5050269605"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":1.5894,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.82654011,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9869999885559082,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.8193070292472839},{"id":"https://openalex.org/keywords/automotive-industry","display_name":"Automotive industry","score":0.7048133015632629},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6437530517578125},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5918692946434021},{"id":"https://openalex.org/keywords/sort","display_name":"sort","score":0.47130879759788513},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.46633172035217285},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4592113494873047},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4414564371109009},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.436079740524292},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4155810475349426},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.413921058177948},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.41335365176200867},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.39664021134376526},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3952258229255676},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39008527994155884},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3543453812599182},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24075070023536682},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12366241216659546}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.8193070292472839},{"id":"https://openalex.org/C526921623","wikidata":"https://www.wikidata.org/wiki/Q190117","display_name":"Automotive industry","level":2,"score":0.7048133015632629},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6437530517578125},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5918692946434021},{"id":"https://openalex.org/C88548561","wikidata":"https://www.wikidata.org/wiki/Q347599","display_name":"sort","level":2,"score":0.47130879759788513},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.46633172035217285},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4592113494873047},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4414564371109009},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.436079740524292},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4155810475349426},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.413921058177948},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.41335365176200867},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.39664021134376526},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3952258229255676},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39008527994155884},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3543453812599182},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24075070023536682},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12366241216659546},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/lats57337.2022.9936975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/lats57337.2022.9936975","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 23rd Latin American Test Symposium (LATS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1673310716","https://openalex.org/W1974836518","https://openalex.org/W2003202688","https://openalex.org/W2115170364","https://openalex.org/W2129282906","https://openalex.org/W2153485205","https://openalex.org/W2735572146","https://openalex.org/W2767313475","https://openalex.org/W2806909220","https://openalex.org/W3114094139","https://openalex.org/W3124406777","https://openalex.org/W3183351902","https://openalex.org/W3187968606","https://openalex.org/W3188239650","https://openalex.org/W4232310948","https://openalex.org/W4283781063","https://openalex.org/W4287882993","https://openalex.org/W6632171433"],"related_works":["https://openalex.org/W2786111245","https://openalex.org/W3009953521","https://openalex.org/W4285708951","https://openalex.org/W1991935474","https://openalex.org/W2021253405","https://openalex.org/W2091533492","https://openalex.org/W2323083271","https://openalex.org/W2802691720","https://openalex.org/W2535245920","https://openalex.org/W2147058777"],"abstract_inverted_index":{"The":[0,61,121,249],"number":[1],"and":[2,11,48,102,205,229,271,275],"complexity":[3],"of":[4,46,91,99,117,161,168,185,216,240,264],"the":[5,14,19,57,72,84,115,118,129,134,153,165,169,178,183,186,196,213,220,224,230,236,241,261,278],"Automotive":[6,257],"Systems-on-Chip":[7],"have":[8],"grown":[9],"dramatically":[10],"continuously":[12],"in":[13,24,44,71,124,133],"last":[15],"decades":[16],"to":[17,35,52,63,77,87,95,139,151,235,247,260],"satisfy":[18],"demand":[20],"for":[21,254],"new":[22],"features":[23],"next-generation":[25],"vehicles.":[26],"On":[27],"balance,":[28],"very":[29],"extensive":[30],"test":[31,59,104,110,203],"sets":[32],"are":[33,42,50,137,227,233,244,252],"needed":[34],"ensure":[36],"products":[37],"quality.":[38],"All":[39],"these":[40],"tests":[41,226],"expensive":[43],"terms":[45],"equipment,":[47],"chip-makers":[49],"struggling":[51],"reduce":[53],"devices":[54,66],"that":[55,128,142,188],"undergo":[56],"entire":[58],"process.":[60],"ability":[62],"isolate":[64],"failing":[65],"as":[67,69],"soon":[68],"possible":[70],"production":[73],"line":[74],"is":[75,127],"crucial":[76],"saving":[78],"money.":[79],"Despite":[80],"ATPG":[81,154,172],"efforts":[82,155],"being":[83],"first":[85,158],"solution":[86],"reach":[88],"high":[89],"levels":[90],"coverage,":[92],"they":[93,276],"lead":[94],"a":[96,159,255],"considerable":[97],"amount":[98],"memory":[100,207],"requirements":[101],"unacceptable":[103],"times.":[105],"This":[106],"paper":[107],"focuses":[108],"on":[109,114,156],"cost":[111],"reduction":[112],"based":[113],"analysis":[116],"circuit":[119,130],"topology.":[120],"assumption":[122],"done":[123],"this":[125,200],"work":[126],"nodes":[131],"located":[132],"densest":[135,166],"areas":[136,167],"likely":[138,246],"be":[140,175],"those":[141],"will":[143,174,189],"show":[144,190],"more":[145,191],"defective":[146,217,231],"behaviors.":[147],"Therefore,":[148],"we":[149],"propose":[150],"focus":[152],"addressing":[157],"subset":[160],"faults":[162],"selected":[163],"from":[164],"device.":[170],"Such":[171],"patterns":[173],"less":[176,237,245],"than":[177],"complete":[179],"set":[180],"but":[181],"preserve":[182],"coverage":[184],"parts":[187],"faults.":[192],"When":[193],"applied":[194],"at":[195,223],"wafer":[197],"sort":[198],"level,":[199],"technique":[201],"reduces":[202],"time":[204],"tester":[206],"demands":[208],"while":[209],"still":[210],"screening":[211],"out":[212],"vast":[214],"majority":[215],"devices.":[218],"Afterwards,":[219],"Test":[221],"escapes":[222],"package":[225],"minimized,":[228],"behaviors":[232],"limited":[234],"critical":[238],"portions":[239],"circuit,":[242],"which":[243],"fail.":[248],"experimental":[250],"results":[251],"reported":[253],"complex":[256],"System-on-Chip":[258],"belonging":[259],"SPC58":[262],"family":[263],"STMicroelectronics":[265],"with":[266],"around":[267],"700K":[268],"Flip":[269],"Flops":[270],"20":[272],"million":[273],"gates,":[274],"demonstrate":[277],"approach":[279],"feasibility.":[280]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
