{"id":"https://openalex.org/W2909866547","doi":"https://doi.org/10.1109/latincom.2018.8613254","title":"IEEE-754 Half-Precision Floating-Point Low-Latency Reciprocal Square Root IP-Core","display_name":"IEEE-754 Half-Precision Floating-Point Low-Latency Reciprocal Square Root IP-Core","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2909866547","doi":"https://doi.org/10.1109/latincom.2018.8613254","mag":"2909866547"},"language":"en","primary_location":{"id":"doi:10.1109/latincom.2018.8613254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latincom.2018.8613254","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 10th Latin-American Conference on Communications (LATINCOM)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063745172","display_name":"Cuauht\u00e9moc R. Aguilera-Galicia","orcid":null},"institutions":[{"id":"https://openalex.org/I113686770","display_name":"Instituto Tecnol\u00f3gico y de Estudios Superiores de Occidente","ror":"https://ror.org/00cwp6m07","country_code":"MX","type":"education","lineage":["https://openalex.org/I113686770"]},{"id":"https://openalex.org/I193181351","display_name":"Universidad de Guadalajara","ror":"https://ror.org/043xj7k26","country_code":"MX","type":"education","lineage":["https://openalex.org/I193181351"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"Cuauhtemoc R. Aguilera-Galicia","raw_affiliation_strings":["Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico","institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020234193","display_name":"Omar Longoria\u2010Gandara","orcid":"https://orcid.org/0000-0002-9239-0821"},"institutions":[{"id":"https://openalex.org/I113686770","display_name":"Instituto Tecnol\u00f3gico y de Estudios Superiores de Occidente","ror":"https://ror.org/00cwp6m07","country_code":"MX","type":"education","lineage":["https://openalex.org/I113686770"]},{"id":"https://openalex.org/I193181351","display_name":"Universidad de Guadalajara","ror":"https://ror.org/043xj7k26","country_code":"MX","type":"education","lineage":["https://openalex.org/I193181351"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Omar Longoria-Gandara","raw_affiliation_strings":["Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico","institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042198077","display_name":"Oscar A. Guzman-Ramos","orcid":null},"institutions":[{"id":"https://openalex.org/I68368234","display_name":"Centro de Investigaci\u00f3n y de Estudios Avanzados del Instituto Polit\u00e9cnico Nacional","ror":"https://ror.org/009eqmr18","country_code":"MX","type":"facility","lineage":["https://openalex.org/I59361560","https://openalex.org/I68368234"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Oscar A. Guzman-Ramos","raw_affiliation_strings":["Department of Electrical Engineering, CINVESTAV-IPN, Zapopan, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, CINVESTAV-IPN, Zapopan, Mexico","institution_ids":["https://openalex.org/I68368234"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053229053","display_name":"Luis Pizano\u2010Escalante","orcid":"https://orcid.org/0000-0001-7034-8967"},"institutions":[{"id":"https://openalex.org/I113686770","display_name":"Instituto Tecnol\u00f3gico y de Estudios Superiores de Occidente","ror":"https://ror.org/00cwp6m07","country_code":"MX","type":"education","lineage":["https://openalex.org/I113686770"]},{"id":"https://openalex.org/I193181351","display_name":"Universidad de Guadalajara","ror":"https://ror.org/043xj7k26","country_code":"MX","type":"education","lineage":["https://openalex.org/I193181351"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Luis Pizano-Escalante","raw_affiliation_strings":["Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Electronics, Systems, and Informatics, ITESO-The Jesuit University of Guadalajara, Tlaquepaque, Mexico","institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004716515","display_name":"Javier Vazouez-Castillo","orcid":null},"institutions":[{"id":"https://openalex.org/I154691954","display_name":"University of Quintana Roo","ror":"https://ror.org/029w3ge75","country_code":"MX","type":"education","lineage":["https://openalex.org/I154691954"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Javier Vazouez-Castillo","raw_affiliation_strings":["Department of Engineering, Universidad de Quintana Roo, Chetumal, Mexico"],"affiliations":[{"raw_affiliation_string":"Department of Engineering, Universidad de Quintana Roo, Chetumal, Mexico","institution_ids":["https://openalex.org/I154691954"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5063745172"],"corresponding_institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"],"apc_list":null,"apc_paid":null,"fwci":1.0684,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.80741465,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.598652720451355},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4877958595752716},{"id":"https://openalex.org/keywords/square-root","display_name":"Square root","score":0.42823362350463867},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14297395944595337},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10311973094940186},{"id":"https://openalex.org/keywords/geometry","display_name":"Geometry","score":0.052374452352523804}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.598652720451355},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4877958595752716},{"id":"https://openalex.org/C11577676","wikidata":"https://www.wikidata.org/wiki/Q134237","display_name":"Square root","level":2,"score":0.42823362350463867},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14297395944595337},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10311973094940186},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.052374452352523804}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/latincom.2018.8613254","is_oa":false,"landing_page_url":"https://doi.org/10.1109/latincom.2018.8613254","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE 10th Latin-American Conference on Communications (LATINCOM)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W605824955","https://openalex.org/W1979147362","https://openalex.org/W1991033876","https://openalex.org/W2096325060","https://openalex.org/W2124391308","https://openalex.org/W2128200518","https://openalex.org/W2135730434","https://openalex.org/W2139040057","https://openalex.org/W2140237823","https://openalex.org/W2162250345","https://openalex.org/W2168579590","https://openalex.org/W2292017636","https://openalex.org/W2529546376","https://openalex.org/W2578802536","https://openalex.org/W2612387305","https://openalex.org/W2800681267","https://openalex.org/W2803752181"],"related_works":["https://openalex.org/W2779562428","https://openalex.org/W1987753576","https://openalex.org/W3033499831","https://openalex.org/W2380362089","https://openalex.org/W1537299347","https://openalex.org/W1574680451","https://openalex.org/W2052158784","https://openalex.org/W2393954573","https://openalex.org/W2361812906","https://openalex.org/W1485152215"],"abstract_inverted_index":{"In":[0],"different":[1],"matrix-decomposition":[2],"techniques":[3],"for":[4,66],"wireless-communication":[5],"systems,":[6,56],"the":[7,28,72,87],"reciprocal":[8],"square":[9],"root":[10],"(RSR)":[11],"is":[12,30],"a":[13,76],"fundamental":[14],"and":[15,22,63,93,98],"recurrent":[16],"operation,":[17],"as":[18],"well":[19],"in":[20],"gaming":[21],"signal":[23],"processing":[24],"systems":[25],"computation":[26],"of":[27,75],"RSR":[29,34,80,100],"required.":[31],"Most":[32],"reported":[33],"architectures":[35],"are":[36],"focused":[37],"on":[38],"accelerating":[39],"high-precision":[40],"floating-point":[41,79],"(FP)":[42],"units.":[43],"The":[44,82],"IEEE":[45],"754-2008":[46],"half-precision":[47,78],"FP":[48,62],"standard":[49],"offers":[50],"larger":[51],"dynamic":[52],"range":[53],"than":[54,60,96],"fixed-point":[55],"fewer":[57],"hardware":[58],"resources":[59],"single-precision":[61],"enough":[64],"precision":[65],"some":[67],"applications.":[68],"This":[69],"article":[70],"reports":[71],"FPGA":[73],"implementation":[74,83],"low-latency,":[77],"unit.":[81],"results":[84],"show":[85],"that":[86],"proposed":[88],"design":[89],"exhibits":[90],"lower":[91],"latency":[92],"better":[94],"throughput":[95],"Intel":[97],"Xilinx":[99],"IP":[101],"cores.":[102]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-03-25T13:04:00.132906","created_date":"2025-10-10T00:00:00"}
